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authorLennert Buytenhek <buytenh@wantstofly.org>2008-03-07 11:47:23 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-03-08 15:53:49 +0000
commit4c91363dc01310dc34f1621ef00d680b4404f71c (patch)
tree34624b7e2ebc3aad1ce8666d0288a6afe70b384b /arch
parent88603f1dc1bf414dc21a0361693d1270231a6c59 (diff)
[ARM] 4856/1: Orion: initialise the sixth PCIe MBUS mapping window as well
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-orion/addr-map.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c
index 2e2fd63643c3..58cc3c0333b6 100644
--- a/arch/arm/mach-orion/addr-map.c
+++ b/arch/arm/mach-orion/addr-map.c
@@ -97,14 +97,20 @@
#define PCIE_BAR_CTRL(n) ORION_PCIE_REG(0x1804 + ((n - 1) * 4))
#define PCIE_BAR_LO(n) ORION_PCIE_REG(0x0010 + ((n) * 8))
#define PCIE_BAR_HI(n) ORION_PCIE_REG(0x0014 + ((n) * 8))
-#define PCIE_WIN_CTRL(n) ORION_PCIE_REG(0x1820 + ((n) << 4))
-#define PCIE_WIN_BASE(n) ORION_PCIE_REG(0x1824 + ((n) << 4))
-#define PCIE_WIN_REMAP(n) ORION_PCIE_REG(0x182c + ((n) << 4))
+#define PCIE_WIN_CTRL(n) (((n) < 5) ? \
+ ORION_PCIE_REG(0x1820 + ((n) << 4)) : \
+ ORION_PCIE_REG(0x1880))
+#define PCIE_WIN_BASE(n) (((n) < 5) ? \
+ ORION_PCIE_REG(0x1824 + ((n) << 4)) : \
+ ORION_PCIE_REG(0x1884))
+#define PCIE_WIN_REMAP(n) (((n) < 5) ? \
+ ORION_PCIE_REG(0x182c + ((n) << 4)) : \
+ ORION_PCIE_REG(0x188c))
#define PCIE_DEFWIN_CTRL ORION_PCIE_REG(0x18b0)
#define PCIE_EXPROM_WIN_CTRL ORION_PCIE_REG(0x18c0)
#define PCIE_EXPROM_WIN_REMP ORION_PCIE_REG(0x18c4)
#define PCIE_MAX_BARS 3
-#define PCIE_MAX_WINS 5
+#define PCIE_MAX_WINS 6
/*
* Use PCIE BAR '1' for all DDR banks