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authorJay Agarwal <jagarwal@nvidia.com>2012-08-16 18:08:12 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 12:32:34 -0700
commitc440ec790d28c279058b1bb5e6006e6d3f7e3781 (patch)
tree34e54d006517c11a8732ac94925e4a3524e0c213 /arch
parente70eb14b4a80ab68186da4635105756e298b0776 (diff)
arm: tegra: pcie: WAR to avoid hang on PCIe device
Setting DFPCI_RSPPASSPW bit in AFI_CONFIGURATION register to avoid instant hang on CPU read/write while gpu transfers are in progress. Bug 1034443 Change-Id: I40c99588753b8b2cb2d418b54c6ac73f7b8ddc13 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/124037 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> Rebase-Id: R9a9557b686bd5f8770ed426856189a0ee2a040f5
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/pcie.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 94c6873dc2e1..5816fe73a713 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -107,6 +107,7 @@
#define AFI_CONFIGURATION 0xac
#define AFI_CONFIGURATION_EN_FPCI (1 << 0)
+#define AFI_CONFIGURATION_DFPCI_RSPPASSPW (1 << 2)
#define AFI_FPCI_ERROR_MASKS 0xb0
@@ -857,8 +858,11 @@ static int tegra_pcie_enable_controller(void)
/* Take the PCIe interface module out of reset */
tegra_periph_reset_deassert(tegra_pcie.pcie_xclk);
+ /* WAR avoid hang on CPU read/write while gpu transfers in progress */
+ val = afi_readl(AFI_CONFIGURATION) | AFI_CONFIGURATION_DFPCI_RSPPASSPW;
+
/* Finally enable PCIe */
- val = afi_readl(AFI_CONFIGURATION) | AFI_CONFIGURATION_EN_FPCI;
+ val |= AFI_CONFIGURATION_EN_FPCI;
afi_writel(val, AFI_CONFIGURATION);
val = (AFI_INTR_EN_INI_SLVERR | AFI_INTR_EN_INI_DECERR |