diff options
author | Zou Weihua -wayne zou <b36644@freescale.com> | 2011-05-12 11:11:13 +0800 |
---|---|---|
committer | Sammy He <r62914@freescale.com> | 2011-05-24 22:46:46 +0800 |
commit | 3f11b80a718011f72f1edd88eb3bc101cb9d4ea9 (patch) | |
tree | 605d93bd03d860b02d2406aa67b59fe1f21b160b /arch | |
parent | 54ab17dcb9bd256f6a3cd2a773294811d92a7499 (diff) |
ENGR00143296-1 Add mc34708 PMIC support for mx53 Ripley Quick Start board.
Add mc34708 machine level driver support for mx53 Ripley Quick Start board.
Signed-off-by: Zou Weihua -wayne zou <b36644@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-mx5/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx5/mx53_loco.c | 56 | ||||
-rw-r--r-- | arch/arm/mach-mx5/mx53_loco_pmic_da9053.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-mx5/mx53_loco_pmic_mc34708.c | 327 | ||||
-rw-r--r-- | arch/arm/mach-mx5/pm.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-mx5/pmic.h | 25 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/hardware.h | 14 |
7 files changed, 417 insertions, 26 deletions
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 784fb2632dbd..96da3738c1ca 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -15,7 +15,7 @@ obj-$(CONFIG_MACH_MX51_BABBAGE) += mx51_babbage.o mx51_babbage_pmic_mc13892.o obj-$(CONFIG_MACH_MX53_EVK) += mx53_evk.o mx53_evk_pmic_mc13892.o obj-$(CONFIG_MACH_MX53_ARD) += mx53_ard.o mx53_ard_pmic_ltc3589.o obj-$(CONFIG_MACH_MX53_SMD) += mx53_smd.o mx53_smd_pmic_da9053.o -obj-$(CONFIG_MACH_MX53_LOCO) += mx53_loco.o mx53_loco_pmic_da9053.o +obj-$(CONFIG_MACH_MX53_LOCO) += mx53_loco.o mx53_loco_pmic_mc34708.o mx53_loco_pmic_da9053.o obj-$(CONFIG_MACH_MX50_ARM2) += mx50_arm2.o mx50_arm2_pmic_mc13892.o obj-$(CONFIG_MACH_MX50_RDP) += mx50_rdp.o mx50_rdp_pmic_mc13892.o mx50_rdp_pmic_mc34708.o obj-$(CONFIG_MXC_BLUETOOTH_RFKILL) += mx53_smd_rfkill.o diff --git a/arch/arm/mach-mx5/mx53_loco.c b/arch/arm/mach-mx5/mx53_loco.c index 577d10d1f7fb..f0569d4e9561 100644 --- a/arch/arm/mach-mx5/mx53_loco.c +++ b/arch/arm/mach-mx5/mx53_loco.c @@ -43,6 +43,7 @@ #include <linux/mxcfb.h> #include <linux/pwm_backlight.h> #include <linux/fec.h> +#include <linux/powerkey.h> #include <linux/ahci_platform.h> #include <linux/gpio_keys.h> #include <linux/mfd/da9052/da9052.h> @@ -66,6 +67,7 @@ #include "crm_regs.h" #include "devices.h" #include "usb.h" +#include "pmic.h" /*! * @file mach-mx5/mx53_loco.c @@ -103,8 +105,7 @@ #define USER_LED_EN (6*32 + 7) /* GPIO_7_7 */ #define USB_PWREN (6*32 + 8) /* GPIO_7_8 */ #define NIRQ (6*32 + 11) /* GPIO7_11 */ - -extern int __init mx53_loco_init_da9052(void); +#define MX53_LOCO_MC34708_IRQ (6*32 + 11) /* GPIO7_11 */ static iomux_v3_cfg_t mx53_loco_pads[] = { /* FEC */ @@ -302,7 +303,6 @@ static struct fec_platform_data fec_data = { }; static struct mxc_dvfs_platform_data dvfs_core_data = { - .reg_id = "DA9052_BUCK_CORE", .clk1_id = "cpu_clk", .clk2_id = "gpc_dvfs_clk", .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET, @@ -325,13 +325,9 @@ static struct mxc_dvfs_platform_data dvfs_core_data = { .delay_time = 30, }; -static struct mxc_bus_freq_platform_data bus_freq_data = { - .gp_reg_id = "DA9052_BUCK_CORE", - .lp_reg_id = "DA9052_BUCK_PRO", -}; +static struct mxc_bus_freq_platform_data bus_freq_data; static struct tve_platform_data tve_data = { - .dac_reg = "DA9052_LDO7", .boot_enable = MXC_TVE_VGA, }; @@ -651,6 +647,31 @@ static void __init loco_add_device_buttons(void) static void __init loco_add_device_buttons(void) {} #endif +static void mxc_register_powerkey(pwrkey_callback pk_cb) +{ + pmic_event_callback_t power_key_event; + + power_key_event.param = (void *)1; + power_key_event.func = (void *)pk_cb; + pmic_event_subscribe(EVENT_PWRONI, power_key_event); +} + +static int mxc_pwrkey_getstatus(int id) +{ + int sense; + + pmic_read_reg(REG_INT_SENSE1, &sense, 0xffffffff); + if (sense & (1 << 3)) + return 0; + + return 1; +} + +static struct power_key_platform_data pwrkey_data = { + .key_value = KEY_F4, + .register_pwrkey = mxc_register_powerkey, + .get_key_status = mxc_pwrkey_getstatus, +}; /*! * Board specific fixup function. It is called by \b setup_arch() in @@ -781,6 +802,9 @@ static void __init mx53_loco_io_init(void) /* LCD panel power enable */ gpio_request(DISP0_POWER_EN, "disp0-power-en"); gpio_direction_output(DISP0_POWER_EN, 1); + + gpio_request(MX53_LOCO_MC34708_IRQ, "pmic-int"); + gpio_direction_input(MX53_LOCO_MC34708_IRQ); } /*! @@ -806,7 +830,21 @@ static void __init mxc_board_init(void) mxc_register_device(&mxci2c_devices[1], &mxci2c_data); mxc_register_device(&mxci2c_devices[2], &mxci2c_data); - mx53_loco_init_da9052(); + if (board_is_mx53_loco_mc34708()) { + mx53_loco_init_mc34708(); + dvfs_core_data.reg_id = "SW1A"; + tve_data.dac_reg = "VDAC"; + bus_freq_data.gp_reg_id = "SW1A"; + bus_freq_data.lp_reg_id = "SW2"; + mxc_register_device(&mxc_powerkey_device, &pwrkey_data); + } + else { + mx53_loco_init_da9052(); + dvfs_core_data.reg_id = "DA9052_BUCK_CORE"; + tve_data.dac_reg = "DA9052_LDO7"; + bus_freq_data.gp_reg_id = "DA9052_BUCK_CORE"; + bus_freq_data.lp_reg_id = "DA9052_BUCK_PRO"; + } mxc_register_device(&mxc_rtc_device, NULL); mxc_register_device(&mxc_ipu_device, &mxc_ipu_data); diff --git a/arch/arm/mach-mx5/mx53_loco_pmic_da9053.c b/arch/arm/mach-mx5/mx53_loco_pmic_da9053.c index ddb905452067..9df700006ed0 100644 --- a/arch/arm/mach-mx5/mx53_loco_pmic_da9053.c +++ b/arch/arm/mach-mx5/mx53_loco_pmic_da9053.c @@ -36,6 +36,7 @@ #include <mach/irqs.h> #include <mach/iomux-mx53.h> #include <mach/gpio.h> +#include "pmic.h" #define DA9052_LDO(max, min, rname, suspend_mv) \ {\ diff --git a/arch/arm/mach-mx5/mx53_loco_pmic_mc34708.c b/arch/arm/mach-mx5/mx53_loco_pmic_mc34708.c new file mode 100644 index 000000000000..d2571c247498 --- /dev/null +++ b/arch/arm/mach-mx5/mx53_loco_pmic_mc34708.c @@ -0,0 +1,327 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/i2c.h> +#include <linux/irq.h> +#include <linux/interrupt.h> +#include <linux/err.h> +#include <linux/pmic_external.h> +#include <linux/regulator/machine.h> +#include <linux/mfd/mc34708/core.h> +#include <mach/irqs.h> +#include <mach/iomux-mx53.h> +#include <mach/gpio.h> +#include "pmic.h" + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +/* regulator standby mask */ +#define GEN1_STBY_MASK (1 << 1) +#define GEN2_STBY_MASK (1 << 13) +#define PLL_STBY_MASK (1 << 16) +#define USB2_STBY_MASK (1 << 19) +#define USB_EN_MASK (1 << 3) + +#define REG_MODE_0_ALL_MASK (GEN1_STBY_MASK) + +#define SW1A_MODE_MASK (0xf << 0) +#define SW2_MODE_MASK (0xf << 14) +#define SW1A_MODE_VALUE (0xc << 0) +#define SW2_MODE_VALUE (0xc << 14) + +#define REG_SW_1_2_MASK (SW1A_MODE_MASK | SW2_MODE_MASK) +#define REG_SW_1_2_VALUE (SW1A_MODE_VALUE | SW2_MODE_VALUE) + +#define SW3_MODE_MASK (0xf << 0) +#define SW4A_MODE_MASK (0xf << 6) +#define SW4B_MODE_MASK (0xf << 12) +#define SW5_MODE_MASK (0xf << 18) + +#define SW3_MODE_VALUE (0x0 << 0) +#define SW4A_MODE_VALUE (0xc << 6) +#define SW4B_MODE_VALUE (0xc << 12) +#define SW5_MODE_VALUE (0xc << 18) + +#define REG_SW_3_4_5_MASK (SW3_MODE_MASK | SW4A_MODE_MASK\ + | SW4B_MODE_MASK | SW5_MODE_MASK) +#define REG_SW_3_4_5_VALUE (SW3_MODE_VALUE | SW4A_MODE_VALUE\ + | SW4B_MODE_VALUE | SW5_MODE_VALUE) + +#define SWBST_MODE_MASK (0x3 << 5) +#define SWBST_MODE_VALUE (0x0 << 5) + +#define REG_SWBST_MODE_MASK (SWBST_MODE_MASK) +#define REG_SWBST_MODE_VALUE (SWBST_MODE_VALUE) + +#define SWHOLD_MASK (0x1 << 12) + +#define MC34708_I2C_DEVICE_NAME "mc34708" +/* 7-bit I2C bus slave address */ +#define MC34708_I2C_ADDR (0x08) +#define MX53_LOCO_MC34708_IRQ (6*32 + 11) /* GPIO7_11 */ + +struct mc34708; + +static struct regulator_init_data sw1a_init = { + .constraints = { + .name = "SW1", + .min_uV = 650000, + .max_uV = 1437500, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .valid_modes_mask = 0, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 850000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data sw1b_init = { + .constraints = { + .name = "SW1B", + .min_uV = 650000, + .max_uV = 1437500, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .valid_modes_mask = 0, + .always_on = 1, + .boot_on = 1, + }, +}; + +static struct regulator_init_data sw2_init = { + .constraints = { + .name = "SW2", + .min_uV = 650000, + .max_uV = 1437500, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 950000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + } +}; + +static struct regulator_init_data sw3_init = { + .constraints = { + .name = "SW3", + .min_uV = 650000, + .max_uV = 1425000, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data sw4a_init = { + .constraints = { + .name = "SW4A", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(3300), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data sw4b_init = { + .constraints = { + .name = "SW4B", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(3300), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data sw5_init = { + .constraints = { + .name = "SW5", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(1975), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data vrefddr_init = { + .constraints = { + .name = "VREFDDR", + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data vusb_init = { + .constraints = { + .name = "VUSB", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .boot_on = 1, + .always_on = 1, + } +}; + +static struct regulator_init_data swbst_init = { + .constraints = { + .name = "SWBST", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .boot_on = 1, + } +}; + +static struct regulator_init_data vpll_init = { + .constraints = { + .name = "VPLL", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(1800), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + }, +}; + +static struct regulator_init_data vdac_init = { + .constraints = { + .name = "VDAC", + .min_uV = mV_to_uV(2500), + .max_uV = mV_to_uV(2775), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + .always_on = 1, + } +}; + +static struct regulator_init_data vusb2_init = { + .constraints = { + .name = "VUSB2", + .min_uV = mV_to_uV(2500), + .max_uV = mV_to_uV(3000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + .always_on = 1, + } +}; + +static struct regulator_init_data vgen1_init = { + .constraints = { + .name = "VGEN1", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(1550), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 950000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + } +}; + +static struct regulator_init_data vgen2_init = { + .constraints = { + .name = "VGEN2", + .min_uV = mV_to_uV(2500), + .max_uV = mV_to_uV(3300), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + } +}; + +static int mc34708_regulator_init(struct mc34708 *mc34708) +{ + unsigned int value; + + pmic_read_reg(REG_MC34708_IDENTIFICATION, &value, 0xffffff); + pr_info("PMIC MC34708 ID:0x%x\n", value); + + /* setting switch operating mode for SW1/2 regulators */ + pmic_read_reg(REG_MC34708_SW_1_2_OP, &value, 0xffffff); + value &= ~REG_SW_1_2_MASK; + value |= REG_SW_1_2_VALUE; + pmic_write_reg(REG_MC34708_SW_1_2_OP, value, 0xffffff); + + /* setting switch operating mode for SW3/4/5 regulators */ + pmic_read_reg(REG_MC34708_SW_3_4_5_OP, &value, 0xffffff); + value &= ~REG_SW_3_4_5_MASK; + value |= REG_SW_3_4_5_VALUE; + pmic_write_reg(REG_MC34708_SW_3_4_5_OP, value, 0xffffff); + + /* setting switch operating mode for SWBST regulators */ + pmic_read_reg(REG_MC34708_SWBST, &value, 0xffffff); + value &= ~REG_SWBST_MODE_MASK; + value |= REG_SWBST_MODE_VALUE; + pmic_write_reg(REG_MC34708_SWBST, value, 0xffffff); + + /* clear SWHOLD bit to enable USB MUX */ + pmic_read_reg(REG_MC34708_USB_CONTROL, &value, 0xffffff); + value &= ~SWHOLD_MASK; + pmic_write_reg(REG_MC34708_USB_CONTROL, value, 0xffffff); + + mc34708_register_regulator(mc34708, MC34708_SW1A, &sw1a_init); + mc34708_register_regulator(mc34708, MC34708_SW1B, &sw1b_init); + mc34708_register_regulator(mc34708, MC34708_SW2, &sw2_init); + mc34708_register_regulator(mc34708, MC34708_SW3, &sw3_init); + mc34708_register_regulator(mc34708, MC34708_SW4A, &sw4a_init); + mc34708_register_regulator(mc34708, MC34708_SW4B, &sw4b_init); + mc34708_register_regulator(mc34708, MC34708_SW5, &sw5_init); + mc34708_register_regulator(mc34708, MC34708_SWBST, &swbst_init); + mc34708_register_regulator(mc34708, MC34708_VPLL, &vpll_init); + mc34708_register_regulator(mc34708, MC34708_VREFDDR, &vrefddr_init); + mc34708_register_regulator(mc34708, MC34708_VDAC, &vdac_init); + mc34708_register_regulator(mc34708, MC34708_VUSB, &vusb_init); + mc34708_register_regulator(mc34708, MC34708_VUSB2, &vusb2_init); + mc34708_register_regulator(mc34708, MC34708_VGEN1, &vgen1_init); + mc34708_register_regulator(mc34708, MC34708_VGEN2, &vgen2_init); + + regulator_has_full_constraints(); + + return 0; +} + +static struct mc34708_platform_data mc34708_plat = { + .init = mc34708_regulator_init, +}; + +static struct i2c_board_info __initdata mc34708_i2c_device = { + I2C_BOARD_INFO(MC34708_I2C_DEVICE_NAME, MC34708_I2C_ADDR), + .irq = gpio_to_irq(MX53_LOCO_MC34708_IRQ), + .platform_data = &mc34708_plat, +}; + +int __init mx53_loco_init_mc34708(void) +{ + return i2c_register_board_info(0, &mc34708_i2c_device, 1); +} diff --git a/arch/arm/mach-mx5/pm.c b/arch/arm/mach-mx5/pm.c index 95cf4a2eb894..d2e2c892c7bb 100644 --- a/arch/arm/mach-mx5/pm.c +++ b/arch/arm/mach-mx5/pm.c @@ -24,7 +24,6 @@ #include <linux/cpufreq.h> #include <linux/iram_alloc.h> #include <linux/fsl_devices.h> -#include <linux/mfd/da9052/da9052.h> #include <asm/mach-types.h> #include <asm/cacheflush.h> #include <asm/tlb.h> @@ -72,7 +71,7 @@ void __iomem *suspend_param1; #define TZIC_WAKEUP1_OFFSET 0x0E04 #define TZIC_WAKEUP2_OFFSET 0x0E08 #define TZIC_WAKEUP3_OFFSET 0x0E0C -#define GPIO7_0_11_IRQ_BIT (0x1<<11) +#define GPIO7_0_11_IRQ_BIT (0x1<<11) static void mx53_smd_loco_irq_wake_fixup(void) { @@ -116,18 +115,17 @@ static int mx5_suspend_enter(suspend_state_t state) flush_cache_all(); if (cpu_is_mx51() || cpu_is_mx53()) { - if (machine_is_mx53_smd() || - machine_is_mx53_loco()) { + if ((machine_is_mx53_smd() || + machine_is_mx53_loco()) && + (!board_is_mx53_loco_mc34708())) { if (board_is_rev(BOARD_REV_4) || machine_is_mx53_loco()) { mx53_smd_loco_irq_wake_fixup(); da9053_suspend_cmd_sw(); } else { - /* for new OTP DA9053 board, enable other irq for wakeup */ - /* otherwise disable other wakeup sources */ - if (da9053_get_chip_version() != - DA9053_VERSION_BB) - mx53_smd_loco_irq_wake_fixup(); + /* for new OTP DA9053 board, comment out next */ + /* line to enable other irq for wakeup */ + mx53_smd_loco_irq_wake_fixup(); da9053_suspend_cmd_hw(); } } @@ -275,7 +273,7 @@ static int __init pm_init(void) suspend_param1 = cpu_is_mx51() ? (void *)SUSPEND_ID_MX51:(void *)SUSPEND_ID_MX53; /* for mx53 ARD, doesn't operate DDR in suspend */ - if (machine_is_mx53_ard()) + if (machine_is_mx53_ard() || board_is_mx53_loco_mc34708()) suspend_param1 = (void *)SUSPEND_ID_NONE; memcpy(suspend_iram_base, cpu_do_suspend_workaround, SZ_4K); diff --git a/arch/arm/mach-mx5/pmic.h b/arch/arm/mach-mx5/pmic.h new file mode 100644 index 000000000000..ab2c9e3cfda3 --- /dev/null +++ b/arch/arm/mach-mx5/pmic.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef __ASM_ARCH_MACH_PMIC_H__ +#define __ASM_ARCH_MACH_PMIC_H__ + +extern int __init mx53_loco_init_da9052(void); +extern int __init mx53_loco_init_mc34708(void); + +#endif diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index 93a3781d81ca..4106de881ca7 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -92,12 +92,14 @@ extern unsigned int system_rev; #endif #ifdef CONFIG_ARCH_MX5 -#define board_is_mx53_arm2() (cpu_is_mx53() && board_is_rev(BOARD_REV_2)) -#define board_is_mx53_evk_a() (cpu_is_mx53() && board_is_rev(BOARD_REV_1)) -#define board_is_mx53_evk_b() (cpu_is_mx53() && board_is_rev(BOARD_REV_3)) -#define board_is_mx53_ard_a() (cpu_is_mx53() && board_is_rev(BOARD_REV_1)) -#define board_is_mx53_ard_b() (cpu_is_mx53() && board_is_rev(BOARD_REV_2)) -#define board_is_mx50_rd3() (cpu_is_mx50() && board_is_rev(BOARD_REV_4)) +#define board_is_mx53_loco_mc34708() \ + (cpu_is_mx53() && board_is_rev(BOARD_REV_2)) +#define board_is_mx53_arm2() (cpu_is_mx53() && board_is_rev(BOARD_REV_2)) +#define board_is_mx53_evk_a() (cpu_is_mx53() && board_is_rev(BOARD_REV_1)) +#define board_is_mx53_evk_b() (cpu_is_mx53() && board_is_rev(BOARD_REV_3)) +#define board_is_mx53_ard_a() (cpu_is_mx53() && board_is_rev(BOARD_REV_1)) +#define board_is_mx53_ard_b() (cpu_is_mx53() && board_is_rev(BOARD_REV_2)) +#define board_is_mx50_rd3() (cpu_is_mx50() && board_is_rev(BOARD_REV_4)) #endif #include <mach/mxc.h> |