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authorCatalin Marinas <catalin.marinas@arm.com>2007-02-15 19:05:29 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-16 13:06:56 +0000
commit0e0ba76926c37f11f38670db0cb33728f502551e (patch)
treeef6c4b005b64fe9c42a2a9cd903442b1e252797d /arch
parent7770bddb27ea84519486d8bb5d35d36d580c451b (diff)
[ARM] 4201/1: SMP barriers pair needed for the secondary boot process
In some situations, the pen_release store in platform_secondary_init() may stay forever in the write buffer while the CPU is waiting on the boot_lock to be released in boot_secondary(). The primary CPU could never see the pen_release update without the barriers. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-realview/platsmp.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 709a9b1ac634..fce3596f9950 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -59,6 +59,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* pen, then head off into the C entry point
*/
pen_release = -1;
+ smp_wmb();
/*
* Synchronise with the boot thread.
@@ -102,6 +103,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) {
+ smp_rmb();
if (pen_release == -1)
break;