diff options
| author | Robby Cai <R63905@freescale.com> | 2012-10-16 15:53:29 +0800 |
|---|---|---|
| committer | Robby Cai <R63905@freescale.com> | 2012-10-16 17:49:52 +0800 |
| commit | 8c757b8134d3dc7b21f4bf716b8591f5c8523c00 (patch) | |
| tree | b5995d9c14e9cbd94b6ab7a2b5ed902319033758 /arch | |
| parent | 5a1b94e55d3f0f2e3833cd223546b95094db763d (diff) | |
ENGR00229785 pgc: disable display power gating when FB_MXC_ELCDIF_FB configured
Only enable power gating for PXP and EPDC. The feature for ELCDIF still need to
be verified.
Signed-off-by: Robby Cai <R63905@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx6/pm.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/pm.c b/arch/arm/mach-mx6/pm.c index d7889312aeac..9933828df0df 100644 --- a/arch/arm/mach-mx6/pm.c +++ b/arch/arm/mach-mx6/pm.c @@ -178,6 +178,8 @@ static void usb_power_up_handler(void) static void disp_power_down(void) { +#if !defined(CONFIG_FB_MXC_ELCDIF_FB) && \ + !defined(CONFIG_FB_MXC_ELCDIF_FB_MODULE) if (cpu_is_mx6sl()) { __raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PUPSCR_OFFSET); __raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PDNSCR_OFFSET); @@ -194,10 +196,13 @@ static void disp_power_down(void) ~MXC_CCM_CCGRx_CG1_MASK, MXC_CCM_CCGR3); } +#endif } static void disp_power_up(void) { +#if !defined(CONFIG_FB_MXC_ELCDIF_FB) && \ + !defined(CONFIG_FB_MXC_ELCDIF_FB_MODULE) if (cpu_is_mx6sl()) { /* * Need to enable EPDC/LCDIF pix clock, and @@ -214,6 +219,7 @@ static void disp_power_up(void) __raw_writel(0x20, gpc_base + GPC_CNTR_OFFSET); __raw_writel(0x1, gpc_base + GPC_PGC_DISP_SR_OFFSET); } +#endif } static void mx6_suspend_store(void) |