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authorTroy Kisky <troy.kisky@boundarydevices.com>2013-12-16 18:12:54 -0700
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 21:29:23 +0800
commitc40f58aa7bbc13ac8134a2a4fbdbae9fbdc159e0 (patch)
tree85f018e6a37773896ea5015a260aeff47e594232 /arch
parent473f0fc06008f240a47e5207f3fdf31beaf63214 (diff)
ARM: dts: imx6qdl-sabrelite: move spi-nor CS to pinctrl_ecspi1
This patch moves pin EIM_D19 (CS) from pinctrl_hog to pinctrl_ecspi1. It also explicitly sets the pad to 0x000b1. Before this patch, it has the value 0x100b1 if using mainline u-boot. So this patch also removes hysteresis since the pad is always an output. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabrelite.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index b4646c46f02d..895d4d6810c4 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,6 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
@@ -135,6 +134,7 @@
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
>;
};