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authorAlison Wang <b18965@freescale.com>2012-10-09 12:36:45 +0800
committerAndy Voltz <andy.voltz@timesys.com>2012-10-17 14:37:26 -0400
commit303f7cf53e94893d816f7e77d4d03b4311b6aece (patch)
tree836dad917b5938d9ca41813da43f85420042cc6b /arch
parentadb31b21d85a1d8d1aff1e5177f393d4a49bf0e7 (diff)
ENGR00181358-3: fec: add second FEC support for Vybrid
Add second FEC support for Vybrid. Signed-off-by: Alison Wang <b18965@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mvf/board-twr-vf700.c13
-rw-r--r--arch/arm/mach-mvf/clock.c1
-rw-r--r--arch/arm/mach-mvf/devices-mvf.h6
-rw-r--r--arch/arm/mach-mvf/mvf_fec.c5
-rw-r--r--arch/arm/plat-mxc/devices/platform-fec.c19
-rwxr-xr-xarch/arm/plat-mxc/include/mach/devices-common.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mvf.h29
7 files changed, 71 insertions, 6 deletions
diff --git a/arch/arm/mach-mvf/board-twr-vf700.c b/arch/arm/mach-mvf/board-twr-vf700.c
index f725b8c25bef..063ba4b50d2b 100644
--- a/arch/arm/mach-mvf/board-twr-vf700.c
+++ b/arch/arm/mach-mvf/board-twr-vf700.c
@@ -124,6 +124,19 @@ static iomux_v3_cfg_t mvf600_pads[] = {
MVF600_PAD52_PTC7__RMII0_TXD0,
MVF600_PAD53_PTC8__RMII0_TXEN,
+#ifdef CONFIG_FEC1
+ /*FEC1*/
+ MVF600_PAD54_PTC9__RMII1_MDC,
+ MVF600_PAD55_PTC10__RMII1_MDIO,
+ MVF600_PAD56_PTC11__RMII1_CRS_DV,
+ MVF600_PAD57_PTC12__RMII1_RXD1,
+ MVF600_PAD58_PTC13__RMII1_RXD0,
+ MVF600_PAD59_PTC14__RMII1_RXER,
+ MVF600_PAD60_PTC15__RMII1_TXD1,
+ MVF600_PAD61_PTC16__RMII1_TXD0,
+ MVF600_PAD62_PTC17__RMII1_TXEN,
+#endif
+
/*SAI2*/
MVF600_PAD6_PTA16_SAI2_TX_BCLK,
MVF600_PAD8_PTA18_SAI2_TX_DATA,
diff --git a/arch/arm/mach-mvf/clock.c b/arch/arm/mach-mvf/clock.c
index 4e0451aff8c4..e48711a4f835 100644
--- a/arch/arm/mach-mvf/clock.c
+++ b/arch/arm/mach-mvf/clock.c
@@ -1862,6 +1862,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("mvf-dspi.0", NULL, dspi_clk[0]),
_REGISTER_CLOCK("pit", NULL, pit_clk),
_REGISTER_CLOCK("fec.0", NULL, enet_clk[0]),
+ _REGISTER_CLOCK("fec.1", NULL, enet_clk[1]),
_REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk),
_REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc1_clk),
_REGISTER_CLOCK("mvf-dcu.0", NULL, dcu0_clk),
diff --git a/arch/arm/mach-mvf/devices-mvf.h b/arch/arm/mach-mvf/devices-mvf.h
index c79cddd7a496..61792fb34530 100644
--- a/arch/arm/mach-mvf/devices-mvf.h
+++ b/arch/arm/mach-mvf/devices-mvf.h
@@ -27,9 +27,9 @@ extern const struct imx_snvs_rtc_data mvf_snvs_rtc_data __initconst;
#define mvf_add_snvs_rtc() \
imx_add_snvs_rtc(&mvf_snvs_rtc_data)
-extern const struct imx_fec_data mvf_fec_data __initconst;
-#define mvf_add_fec(pdata) \
- imx_add_fec(&mvf_fec_data, pdata)
+extern const struct imx_fec_data mvf_fec_data[] __initconst;
+#define mvf_add_fec(id, pdata) \
+ imx_add_fec(id, &mvf_fec_data[id], pdata)
extern const struct imx_sdhci_esdhc_imx_data
mvf_sdhci_esdhc_imx_data[] __initconst;
diff --git a/arch/arm/mach-mvf/mvf_fec.c b/arch/arm/mach-mvf/mvf_fec.c
index 430793105e98..d51f20519c0b 100644
--- a/arch/arm/mach-mvf/mvf_fec.c
+++ b/arch/arm/mach-mvf/mvf_fec.c
@@ -52,5 +52,8 @@ void __init mvf_init_fec(struct fec_platform_data fec_data)
if (!is_valid_ether_addr(fec_data.mac))
memcpy(fec_data.mac, default_mac, ETH_ALEN);
- mvf_add_fec(&fec_data);
+ mvf_add_fec(0, &fec_data);
+#ifdef CONFIG_FEC1
+ mvf_add_fec(1, &fec_data);
+#endif
}
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c
index 4ad06d2cfb72..c0e8709f036b 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/plat-mxc/devices/platform-fec.c
@@ -55,11 +55,22 @@ const struct imx_fec_data imx6q_fec_data __initconst =
#endif
#ifdef CONFIG_SOC_MVFA5
- const struct imx_fec_data mvf_fec_data __initconst =
- imx_fec_data_entry_single(MVF);
+#define mvf_fec_data_entry_single(soc, id) \
+ { \
+ .iobase = soc ## _MAC ## id ## _BASE_ADDR, \
+ .irq = soc ## _INT_ENET_MAC ## id, \
+ }
+
+const struct imx_fec_data mvf_fec_data[] __initconst = {
+ mvf_fec_data_entry_single(MVF, 0),
+ mvf_fec_data_entry_single(MVF, 1),
+};
#endif
struct platform_device *__init imx_add_fec(
+#ifdef CONFIG_SOC_MVFA5
+ const int id,
+#endif
const struct imx_fec_data *data,
const struct fec_platform_data *pdata)
{
@@ -75,7 +86,11 @@ struct platform_device *__init imx_add_fec(
},
};
+#ifdef CONFIG_SOC_MVFA5
+ return imx_add_platform_device_dmamask("fec", id,
+#else
return imx_add_platform_device_dmamask("fec", 0,
+#endif
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index 2ba8c8663402..a8a8034c1010 100755
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -37,7 +37,11 @@ struct imx_fec_data {
resource_size_t iobase;
resource_size_t irq;
};
+
struct platform_device *__init imx_add_fec(
+#ifdef CONFIG_SOC_MVFA5
+ const int id,
+#endif
const struct imx_fec_data *data,
const struct fec_platform_data *pdata);
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h
index 309a8ca8e621..b1bbb0955010 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h
@@ -153,6 +153,35 @@ typedef enum iomux_config {
IOMUX_PAD(0x00D4, 0x00D4, 1, 0x0000, 0, \
MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_ENABLE)
+/*FEC1*/
+#define MVF600_PAD54_PTC9__RMII1_MDC \
+ IOMUX_PAD(0x00D8, 0x00D8, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_ENABLE)
+#define MVF600_PAD55_PTC10__RMII1_MDIO \
+ IOMUX_PAD(0x00DC, 0x00DC, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
+#define MVF600_PAD56_PTC11__RMII1_CRS_DV \
+ IOMUX_PAD(0x00E0, 0x00E0, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD57_PTC12__RMII1_RXD1 \
+ IOMUX_PAD(0x00E4, 0x00E4, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD58_PTC13__RMII1_RXD0 \
+ IOMUX_PAD(0x00E8, 0x00E8, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD59_PTC14__RMII1_RXER \
+ IOMUX_PAD(0x00EC, 0x00EC, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_IBE_ENABLE)
+#define MVF600_PAD60_PTC15__RMII1_TXD1 \
+ IOMUX_PAD(0x00F0, 0x00F0, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_ENABLE)
+#define MVF600_PAD61_PTC16__RMII1_TXD0 \
+ IOMUX_PAD(0x00F4, 0x00F4, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_ENABLE)
+#define MVF600_PAD62_PTC17__RMII1_TXEN \
+ IOMUX_PAD(0x00F8, 0x00F8, 1, 0x0000, 0, \
+ MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_ENABLE)
+
/*USB0/1 VBUS, using the GPIO*/
#define MVF600_PAD85_PTD6__USB0_VBUS_EN \
IOMUX_PAD(0x0154, 0x0154, 0, 0x0000, 0, \