diff options
| author | Wayne Zou <b36644@freescale.com> | 2012-02-16 15:28:11 +0800 |
|---|---|---|
| committer | Wayne Zou <b36644@freescale.com> | 2012-02-16 16:47:42 +0800 |
| commit | a5f136c3908e1e5551d2c870b2fe9196f8984d72 (patch) | |
| tree | 6ce3828f0a0afb40784860c95c39037849197544 /arch | |
| parent | 5c2d296401e2ded0cd36f9e651871c6454049de1 (diff) | |
ENGR00174649 i.mx6dl: clock: set ipu1 clock to 270M, change ldb_di_clk parent
Set ipu1 clock to 270M, source from pll3_pfd_540M for best performance.
And set ldb_di_clk parent to pll2_pfd_352M.
Signed-off-by: Wayne Zou <b36644@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index c23009884da2..56f78392b785 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -5223,6 +5223,11 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc, /* on mx6dl gpu2d_axi_clk source from mmdc0 directly */ clk_set_parent(&gpu2d_axi_clk, &mmdc_ch0_axi_clk[0]); gpu2d_axi_clk.secondary = NULL; + + /* on mx6dl, max ipu clock is 274M */ + clk_set_parent(&ipu1_clk, &pll3_pfd_540M); + clk_set_parent(&ldb_di0_clk, &pll2_pfd_352M); + clk_set_parent(&ldb_di1_clk, &pll2_pfd_352M); } if (cpu_is_mx6q()) clk_set_parent(&gpu2d_core_clk[0], &pll3_usb_otg_main_clk); |