diff options
author | Robby Cai <R63905@freescale.com> | 2013-08-28 13:43:59 +0800 |
---|---|---|
committer | Robby Cai <R63905@freescale.com> | 2013-08-30 18:10:35 +0800 |
commit | bf3507f85749b765674f6130ae9b5aa60563dbec (patch) | |
tree | e41a93ebbbc9aa7a4a640e25e6b30d18b248f52b /arch | |
parent | c1e6f6004bbdbb9f517ce136288104d5dc86e861 (diff) |
ENGR00276832-2 ARM: dts: add max17135 support
Add DTS for max17135 on imx6 duallite sabresd board and
imx6 sololite evk board.
Signed-off-by: Robby Cai <R63905@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/imx6dl-sabresd.dts | 87 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sl-evk.dts | 71 |
3 files changed, 160 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6dl-sabresd.dts b/arch/arm/boot/dts/imx6dl-sabresd.dts index 305be4d563c5..c26602f677d8 100644 --- a/arch/arm/boot/dts/imx6dl-sabresd.dts +++ b/arch/arm/boot/dts/imx6dl-sabresd.dts @@ -22,6 +22,93 @@ offset-usb-charger = <1285>; }; +&i2c3 { + max17135@48 { + compatible = "maxim,max17135"; + reg = <0x48>; + vneg_pwrup = <1>; + gvee_pwrup = <1>; + vpos_pwrup = <2>; + gvdd_pwrup = <1>; + gvdd_pwrdn = <1>; + vpos_pwrdn = <2>; + gvee_pwrdn = <1>; + vneg_pwrdn = <1>; + SENSOR-supply = <®_sensor>; + gpio_pmic_pwrgood = <&gpio2 21 0>; + gpio_pmic_vcom_ctrl = <&gpio3 17 0>; + gpio_pmic_wakeup = <&gpio3 20 0>; + gpio_pmic_v3p3 = <&gpio2 20 0>; + gpio_pmic_intr = <&gpio2 25 0>; + + regulators { + DISPLAY_reg: DISPLAY { + regulator-name = "DISPLAY"; + }; + + GVDD_reg: GVDD { + /* 20v */ + regulator-name = "GVDD"; + }; + + GVEE_reg: GVEE { + /* -22v */ + regulator-name = "GVEE"; + }; + + HVINN_reg: HVINN { + /* -22v */ + regulator-name = "HVINN"; + }; + + HVINP_reg: HVINP { + /* 20v */ + regulator-name = "HVINP"; + }; + + VCOM_reg: VCOM { + regulator-name = "VCOM"; + /* 2's-compliment, -4325000 */ + regulator-min-microvolt = <0xffbe0178>; + /* 2's-compliment, -500000 */ + regulator-max-microvolt = <0xfff85ee0>; + }; + + VNEG_reg: VNEG { + /* -15v */ + regulator-name = "VNEG"; + }; + + VPOS_reg: VPOS { + /* 15v */ + regulator-name = "VPOS"; + }; + + V3P3_reg: V3P3 { + regulator-name = "V3P3"; + }; + }; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_1>, <&pinctrl_hog_2>; + + hog { + pinctrl_hog_2: hoggrp-2 { + fsl,pins = < + /* MAX17135 */ + MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000 + MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x80000000 + MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 + MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000 + MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000 + >; + }; + }; +}; + &ldb { ipu_id = <0>; sec_ipu_id = <0>; diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 7a98d8c4659b..fffc19f30aee 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -456,10 +456,10 @@ &iomuxc { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; + pinctrl-0 = <&pinctrl_hog_1>; hog { - pinctrl_hog: hoggrp { + pinctrl_hog_1: hoggrp-1 { fsl,pins = < MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index ae1fa96bb49a..c46ea15c859c 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -59,6 +59,72 @@ pinctrl-0 = <&pinctrl_i2c1_1>; status = "okay"; + max17135@48 { + compatible = "maxim,max17135"; + reg = <0x48>; + vneg_pwrup = <1>; + gvee_pwrup = <2>; + vpos_pwrup = <10>; + gvdd_pwrup = <12>; + gvdd_pwrdn = <1>; + vpos_pwrdn = <2>; + gvee_pwrdn = <8>; + vneg_pwrdn = <10>; + gpio_pmic_pwrgood = <&gpio2 13 0>; + gpio_pmic_vcom_ctrl = <&gpio2 3 0>; + gpio_pmic_wakeup = <&gpio2 14 0>; + gpio_pmic_v3p3 = <&gpio2 7 0>; + gpio_pmic_intr = <&gpio2 12 0>; + + regulators { + DISPLAY_reg: DISPLAY { + regulator-name = "DISPLAY"; + }; + + GVDD_reg: GVDD { + /* 20v */ + regulator-name = "GVDD"; + }; + + GVEE_reg: GVEE { + /* -22v */ + regulator-name = "GVEE"; + }; + + HVINN_reg: HVINN { + /* -22v */ + regulator-name = "HVINN"; + }; + + HVINP_reg: HVINP { + /* 20v */ + regulator-name = "HVINP"; + }; + + VCOM_reg: VCOM { + regulator-name = "VCOM"; + /* 2's-compliment, -4325000 */ + regulator-min-microvolt = <0xffbe0178>; + /* 2's-compliment, -500000 */ + regulator-max-microvolt = <0xfff85ee0>; + }; + + VNEG_reg: VNEG { + /* -15v */ + regulator-name = "VNEG"; + }; + + VPOS_reg: VPOS { + /* 15v */ + regulator-name = "VPOS"; + }; + + V3P3_reg: V3P3 { + regulator-name = "V3P3"; + }; + }; + }; + mma8450@1c { compatible = "fsl,mma8450"; reg = <0x1c>; @@ -93,6 +159,11 @@ MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x80000000 MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x80000000 + MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x80000000 + MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x80000000 + MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x80000000 + MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x80000000 + MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x80000000 >; }; }; |