ENGR00276023-1 ARM: dts: imx6: adjust some device node to support LDO_BYPASS

Modify devicetree to support LDO_BYPASS mode.

Signed-off-by: Robin Gong <b38343@freescale.com>

4 files changed, 27 insertions, 4 deletions

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 7db352c41473..76868b0f17d7 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -16,7 +16,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
 			reg = <0>;
@@ -65,7 +65,7 @@
 			fsl,max_ddr_freq = <400000000>;
 		};
 
-		gpu@00130000 {
+		gpu: gpu@00130000 {
 			compatible = "fsl,imx6dl-gpu", "fsl,imx6q-gpu";
 			reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
 			      <0x0 0x0>;
@@ -81,6 +81,7 @@
 				      "gpu3d_shader_clk";
 			resets = <&src 0>, <&src 3>;
 			reset-names = "gpu3d", "gpu2d";
+			pu-supply = <&reg_pu>;
 		};
 
 		ocram: sram@00900000 {
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index ed515cd3f97f..a7246d4c722a 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -20,7 +20,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
 			reg = <0>;
@@ -84,7 +84,7 @@
 			fsl,max_ddr_freq = <528000000>;
 		};
 
-		gpu@00130000 {
+		gpu: gpu@00130000 {
 			compatible = "fsl,imx6q-gpu";
 			reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
 			      <0x02204000 0x4000>, <0x0 0x0>;
@@ -100,6 +100,7 @@
 				      "gpu3d_clk", "gpu3d_shader_clk";
 			resets = <&src 0>, <&src 3>, <&src 3>;
 			reset-names = "gpu3d", "gpu2d", "gpuvg";
+			pu-supply = <&reg_pu>;
 		};
 
 		ocram: sram@00900000 {
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 16b683cc7865..94d10ca0e1dc 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -207,6 +207,12 @@
 	status = "okay";
 };
 
+&cpu0 {
+	arm-supply = <&sw1a_reg>;
+	soc-supply = <&sw1c_reg>;
+	pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
+};
+
 &ecspi1 {
 	fsl,spi-num-chipselects = <1>;
 	cs-gpios = <&gpio4 9 0>;
@@ -235,6 +241,12 @@
 	fsl,cpu_pupscr_sw = <0xf>;
 	fsl,cpu_pdnscr_iso2sw = <0x1>;
 	fsl,cpu_pdnscr_iso = <0x1>;
+	fsl,ldo-bypass; /* use ldo-bypass, u-boot will check it and configure */
+	pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
+};
+
+&gpu {
+	pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
 };
 
 &hdmi_cec {
@@ -331,6 +343,7 @@
 				regulator-max-microvolt = <1875000>;
 				regulator-boot-on;
 				regulator-always-on;
+				regulator-ramp-delay = <6250>;
 			};
 
 			sw2_reg: sw2 {
@@ -573,3 +586,7 @@
 	wp-gpios = <&gpio2 1 0>;
 	status = "okay";
 };
+
+&vpu {
+	pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
+};
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index a5f5f658ca4d..5ae0da5d9693 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -60,6 +60,10 @@
 		};
 	};
 
+	pu_dummy: pudummy_reg {
+		compatible = "fsl,imx6-dummy-pureg"; /* only used in ldo-bypass */
+	};
+
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;