diff options
| author | Daniel Baluta <daniel.baluta@nxp.com> | 2017-07-05 18:40:28 +0300 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
| commit | b76317d848d4b383e7a6f83b8d989c558006c545 (patch) | |
| tree | d883ac9a4c811e90ca11877916fcdf891cfad0be /arch | |
| parent | b15cae7b6d24a998e3538a37b88b5c93e3fce8df (diff) | |
MLK-15317-4: ARM64: dts: Add SAI1 definition
This specifies:
* EDMA - SAI1 channels mapping
* SAI1 TX/RX interrupts
* SAI1 controller node definition
* register address
* interrupts
* clocks
This is based on Audio_QM_v0.1.07.pdf document.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi index ff39f2b48179..eb6e4c3d934f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi @@ -1343,11 +1343,13 @@ <0x0 0x59290000 0x0 0x10000>, /* spdif0 tx */ <0x0 0x592c0000 0x0 0x10000>, /* sai0 rx */ <0x0 0x592d0000 0x0 0x10000>, /* sai0 tx */ + <0x0 0x592e0000 0x0 0x10000>, /* sai1 rx */ + <0x0 0x592f0000 0x0 0x10000>, /* sai1 tx */ <0x0 0x59350000 0x0 0x10000>, <0x0 0x59370000 0x0 0x10000>; #dma-cells = <3>; shared-interrupt; - dma-channels = <14>; + dma-channels = <16>; interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc 0 */ <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, @@ -1360,6 +1362,8 @@ <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, /* sai0 */ <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, /* sai1 */ + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "edma-chan0-tx", "edma-chan1-tx", /* asrc0 */ @@ -1368,6 +1372,7 @@ "edma-chan6-tx", "edma-chan7-tx", /* esai0 */ "edma-chan8-tx", "edma-chan9-tx", /* spdif0 */ "edma-chan12-tx", "edma-chan13-tx", /* sai0 */ + "edma-chan14-tx", "edma-chan15-tx", /* sai1 */ "edma-chan21-tx", /* gpt5 */ "edma-chan23-tx"; /* gpt7 */ status = "okay"; @@ -1396,6 +1401,22 @@ power-domains = <&pd_sai0>; }; + sai1: sai@59050000 { + compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; + reg = <0x0 0x59050000 0x0 0x10000>; + interrupts = <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8QXP_AUD_SAI_0_IPG>, + <&clk IMX8QXP_CLK_DUMMY>, + <&clk IMX8QXP_AUD_SAI_1_MCLK>, + <&clk IMX8QXP_CLK_DUMMY>, + <&clk IMX8QXP_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <&edma2 14 0 1>, <&edma2 15 0 0>; + status = "disabled"; + power-domains = <&pd_sai1>; + }; + asrc0: asrc@59000000 { compatible = "fsl,imx8qm-asrc0"; reg = <0x0 0x59000000 0x0 0x10000>; |