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authorLinus Torvalds <torvalds@linux-foundation.org>2009-10-05 12:06:59 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-10-05 12:06:59 -0700
commite8d809c61325a2f799dc753b0ac72ace6958b92c (patch)
tree21c1dc8935445335e8ee62be12488b73a2376049 /arch
parentef790fe022916a225f7ba7fc565ffc51404655f7 (diff)
parent131e4e97bfee809dc64febe8accef2f042a92722 (diff)
Merge branch 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze
* 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Clear sticky FSR register after saving it to func parametr microblaze: UMS is used only for MMU kernel
Diffstat (limited to 'arch')
-rw-r--r--arch/microblaze/kernel/entry.S2
-rw-r--r--arch/microblaze/kernel/hw_exception_handler.S2
-rw-r--r--arch/microblaze/kernel/process.c2
3 files changed, 5 insertions, 1 deletions
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index acc1f05d1e2c..e3ecb36dd554 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -592,6 +592,8 @@ C_ENTRY(full_exception_trap):
nop
mfs r7, rfsr; /* save FSR */
nop
+ mts rfsr, r0; /* Clear sticky fsr */
+ nop
la r12, r0, full_exception
set_vms;
rtbd r12, 0;
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 6b0288ebccd6..2b86c03aa841 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -384,7 +384,7 @@ handle_other_ex: /* Handle Other exceptions here */
addk r8, r17, r0; /* Load exception address */
bralid r15, full_exception; /* Branch to the handler */
nop;
- mts r0, rfsr; /* Clear sticky fsr */
+ mts rfsr, r0; /* Clear sticky fsr */
nop
/*
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index 4201c743cc9f..c592d475b3d8 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -235,7 +235,9 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
regs->pc = pc;
regs->r1 = usp;
regs->pt_mode = 0;
+#ifdef CONFIG_MMU
regs->msr |= MSR_UMS;
+#endif
}
#ifdef CONFIG_MMU