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authorMing Wong <miwong@nvidia.com>2011-10-14 12:29:20 -0700
committerSimone Willett <swillett@nvidia.com>2011-10-25 16:34:14 -0700
commitdf4679db62b164e33e82fe56a18787cfca431d82 (patch)
tree7042dcf0ee49b277b50965a19ec6e0dd5545da5c /arch
parent2af190f7b5842c2bc53694d2d94cd79c4ec50afe (diff)
video: tegra: dsi: Add support for DCS short write (1 parameter)
Add MIPI DCS short write (1 parameter) support. The cmds sent with this new function will be sent every frame by hardware Bug 884157 Change-Id: I4110f5698d7156c481ef70c5a343ef4920a78677 Reviewed-on: http://git-master/r/58180 Tested-by: Ming Wong <miwong@nvidia.com> Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/include/mach/dc.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/dc.h b/arch/arm/mach-tegra/include/mach/dc.h
index f42383429906..2ea1410f1d14 100644
--- a/arch/arm/mach-tegra/include/mach/dc.h
+++ b/arch/arm/mach-tegra/include/mach/dc.h
@@ -525,6 +525,8 @@ struct tegra_dc_pwm_params {
void tegra_dc_config_pwm(struct tegra_dc *dc, struct tegra_dc_pwm_params *cfg);
+int tegra_dsi_send_panel_short_cmd(struct tegra_dc *dc, u8 *pdata, u8 data_len);
+
int tegra_dc_update_csc(struct tegra_dc *dc, int win_index);
/*