diff options
| author | Hyungwoo Yang <hyungwooy@nvidia.com> | 2011-10-28 18:57:08 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:50:20 -0800 |
| commit | df82b6371ab4247e085e12c983d88e7758b3c566 (patch) | |
| tree | 1d638e8b904d7d065cf1b03b68f1785e93d494bd /arch | |
| parent | ced29868819d5259801b4344fa7e909fe0adb28e (diff) | |
arm: tegra: cardhu: Support PM313 SKU0001
PM313 SKU0001 supports selecting BPP ( 18bpp or 24bpp )
Bug 822980
Reviewed-on: http://git-master/r/61005
(cherry picked from commit c6f9f5ebfe5f85bc56298092dce142980bed5d71)
Change-Id: Ifa25704d91bdd9de164b2baac835c38f0cdc0813
Reviewed-on: http://git-master/r/66576
Reviewed-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Tested-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Rebase-Id: Ra8e388176b4d7d35915809d5272524ad0fa02cae
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/board-cardhu-panel.c | 40 |
1 files changed, 26 insertions, 14 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu-panel.c b/arch/arm/mach-tegra/board-cardhu-panel.c index cb5fdb937726..e5d5d345ad8b 100644 --- a/arch/arm/mach-tegra/board-cardhu-panel.c +++ b/arch/arm/mach-tegra/board-cardhu-panel.c @@ -45,13 +45,15 @@ #define DSI_PANEL_RESET 0 /* Select LVDS panel resolution. 13X7 is default */ -#define PM313_LVDS_PANEL_19X12_18BPP 1 +#define PM313_LVDS_PANEL_19X12 1 +#define PM313_LVDS_PANEL_BPP 1 /* 0:24bpp, 1:18bpp */ /* PM313 display board specific pins */ #define pm313_R_FDE TEGRA_GPIO_PW0 #define pm313_R_FB TEGRA_GPIO_PN4 #define pm313_MODE0 TEGRA_GPIO_PZ4 #define pm313_MODE1 TEGRA_GPIO_PW1 +#define pm313_BPP TEGRA_GPIO_PN6 /* 0:24bpp, 1:18bpp */ #define pm313_lvds_shutdown TEGRA_GPIO_PH1 /* E1247 reworked for pm269 pins */ @@ -296,6 +298,7 @@ static int cardhu_panel_enable(void) gpio_set_value(pm313_R_FB, 1); gpio_set_value(pm313_MODE0, 1); gpio_set_value(pm313_MODE1, 0); + gpio_set_value(pm313_BPP, PM313_LVDS_PANEL_BPP); /* FIXME : it may require more or less delay for latching values correctly before enabling RGB2LVDS */ @@ -1056,6 +1059,24 @@ int __init cardhu_panel_init(void) } if (display_board_info.board_id == BOARD_DISPLAY_PM313) { + /* initialize the values */ +#if defined(PM313_LVDS_PANEL_19X12) + cardhu_disp1_out.modes = panel_19X12_modes; + cardhu_disp1_out.n_modes = ARRAY_SIZE(panel_19X12_modes); + cardhu_disp1_out.parent_clk = "pll_d_out0"; +#if (PM313_LVDS_PANEL_BPP == 1) + cardhu_disp1_out.depth = 18; +#else + cardhu_disp1_out.depth = 24; +#endif + cardhu_fb_data.xres = 1920; + cardhu_fb_data.yres = 1200; + + cardhu_disp2_out.parent_clk = "pll_d2_out0"; + cardhu_hdmi_fb_data.xres = 1920; + cardhu_hdmi_fb_data.yres = 1200; +#endif + /* lvds configuration */ err = gpio_request(pm313_R_FDE, "R_FDE"); err |= gpio_direction_output(pm313_R_FDE, 1); @@ -1073,6 +1094,10 @@ int __init cardhu_panel_init(void) err |= gpio_direction_output(pm313_MODE1, 0); tegra_gpio_enable(pm313_MODE1); + err |= gpio_request(pm313_BPP, "BPP"); + err |= gpio_direction_output(pm313_BPP, PM313_LVDS_PANEL_BPP); + tegra_gpio_enable(pm313_BPP); + err = gpio_request(pm313_lvds_shutdown, "lvds_shutdown"); /* free ride provided by bootloader */ err |= gpio_direction_output(pm313_lvds_shutdown, 1); @@ -1080,19 +1105,6 @@ int __init cardhu_panel_init(void) if (err) printk(KERN_ERR "ERROR(s) in LVDS configuration\n"); -#if defined(PM313_LVDS_PANEL_19X12_18BPP) - cardhu_disp1_out.modes = panel_19X12_modes; - cardhu_disp1_out.n_modes = ARRAY_SIZE(panel_19X12_modes); - cardhu_disp1_out.parent_clk = "pll_d_out0"; - cardhu_disp1_out.depth = 18; - - cardhu_fb_data.xres = 1920; - cardhu_fb_data.yres = 1200; - - cardhu_disp2_out.parent_clk = "pll_d2_out0"; - cardhu_hdmi_fb_data.xres = 1920; - cardhu_hdmi_fb_data.yres = 1200; -#endif } else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 && board_info.board_id == BOARD_PM269) || (board_info.board_id == BOARD_E1257) || |