diff options
author | Anson Huang <b20788@freescale.com> | 2014-03-14 16:17:04 +0800 |
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committer | Anson Huang <b20788@freescale.com> | 2014-04-30 13:19:02 +0800 |
commit | d50825b82b4d58a3b38ae280fc62e29222accb1a (patch) | |
tree | 0f2d47ffa0d85eb88f43e83c736a35e02af2cad1 /arch | |
parent | 680623410b0c85461b83c04b5b4d428c64d01f77 (diff) |
ENGR00303665-1 ARM: dts: imx6sx: add busfreq support
Add busfreq support;
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 134329746b91..77f565e94a09 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -88,6 +88,24 @@ interrupt-parent = <&intc>; ranges; + busfreq { + compatible = "fsl,imx6_busfreq"; + clocks = <&clks IMX6SX_CLK_PLL2_BUS>, <&clks IMX6SX_CLK_PLL2_PFD2>, + <&clks IMX6SX_CLK_PLL2_198M>, <&clks IMX6SX_CLK_ARM>, + <&clks IMX6SX_CLK_PLL3_USB_OTG>, <&clks IMX6SX_CLK_PERIPH>, + <&clks IMX6SX_CLK_PERIPH_PRE>, <&clks IMX6SX_CLK_PERIPH_CLK2>, + <&clks IMX6SX_CLK_PERIPH_CLK2_SEL>, <&clks IMX6SX_CLK_OSC>, + <&clks IMX6SX_CLK_PLL1_SYS>, <&clks IMX6SX_CLK_PERIPH2>, + <&clks IMX6SX_CLK_AHB>, <&clks IMX6SX_CLK_OCRAM>, + <&clks IMX6SX_CLK_PLL1_SW>, <&clks IMX6SX_CLK_PERIPH2_PRE>, + <&clks IMX6SX_CLK_PERIPH2_CLK2_SEL>, <&clks IMX6SX_CLK_PERIPH2_CLK2>, + <&clks IMX6SX_CLK_STEP>, <&clks IMX6SX_CLK_MMDC_P0_FAST>; + clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph", + "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "pll1_sys", "periph2", "ahb", "ocram", "pll1_sw", + "periph2_pre", "periph2_clk2_sel", "periph2_clk2", "step", "mmdc"; + fsl,max_ddr_freq = <400000000>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 94 0x04>; |