ENGR00317086-5 dts: Enable dcic driver for imx6sx

Enable dcic driver for imx6sx ARM2 and SDB board.
Setting LCDIF pins bit 4 for loopback to dcic.

Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit bf508e6be22d077043c071477250e208621aefd2)

3 files changed, 75 insertions, 30 deletions

diff --git a/arch/arm/boot/dts/imx6sx-19x19-arm2.dts b/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
index 131f330decfe..fbcff0c22a4d 100644
--- a/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
@@ -405,6 +405,18 @@
 	};
 };
 
+&dcic1 {
+	dcic_id = <0>;
+	dcic_mux = "dcic-lcdif1";
+	status = "okay";
+};
+
+&dcic2 {
+	dcic_id = <1>;
+	dcic_mux = "dcic-lvds";
+	status = "okay";
+};
+
 &pwm3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3_0>;
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index efe80cb19b75..65d69ba36c88 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -602,6 +602,18 @@
 	};
 };
 
+&dcic1 {
+	dcic_id = <0>;
+	dcic_mux = "dcic-lcdif1";
+	status = "okay";
+};
+
+&dcic2 {
+	dcic_id = <1>;
+	dcic_mux = "dcic-lvds";
+	status = "okay";
+};
+
 &pwm3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3_1>;
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 231c6afc6887..1da492574901 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -1080,6 +1080,28 @@
 				reg = <0x02240000 0x40000>;
 				ranges;
 
+				dcic1: dcic@0220c000 {
+					compatible = "fsl,imx6sx-dcic";
+					reg = <0x0220c000 0x4000>;
+					interrupts = <0 124 0x04>;
+					clocks = <&clks IMX6SX_CLK_DCIC1>,
+						<&clks IMX6SX_CLK_DISPLAY_AXI>;
+					clock-names = "dcic", "disp-axi";
+					gpr = <&gpr>;
+					status = "disabled";
+				};
+
+				dcic2: dcic@02210000 {
+					compatible = "fsl,imx6sx-dcic";
+					reg = <0x02210000 0x4000>;
+					interrupts = <0 125 0x04>;
+					clocks = <&clks IMX6SX_CLK_DCIC2>,
+						<&clks IMX6SX_CLK_DISPLAY_AXI>;
+					clock-names = "dcic", "disp-axi";
+					gpr = <&gpr>;
+					status = "disabled";
+				};
+
 				csi1: csi@02214000 {
 					compatible = "fsl,imx6sx-csi", "fsl,imx6sl-csi";
 					reg = <0x02214000 0x4000>;
@@ -1141,7 +1163,6 @@
 					clocks = <&clks IMX6SX_CLK_VADC>,
 							<&clks IMX6SX_CLK_CSI>;
 					clock-names = "vadc", "csi";
-					gpr = <&gpr>;
 					csi_id = <0>;
 					status = "disabled";
 				};
@@ -1477,40 +1498,40 @@
 	lcdif1 {
 		pinctrl_lcdif_dat_0: lcdifdatgrp-0 {
 			fsl,pins = <
-				MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x1b0b0
-				MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x1b0b0
-				MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x1b0b0
-				MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x1b0b0
-				MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x1b0b0
-				MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x1b0b0
-				MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x1b0b0
-				MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x1b0b0
-				MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x1b0b0
-				MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x1b0b0
-				MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x1b0b0
-				MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x1b0b0
-				MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x1b0b0
-				MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x1b0b0
-				MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x1b0b0
-				MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x1b0b0
-				MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x1b0b0
-				MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x1b0b0
-				MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x1b0b0
-				MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x1b0b0
-				MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x1b0b0
-				MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x1b0b0
-				MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x1b0b0
-				MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x1b0b0
+				MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
+				MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
 			>;
 		};
 
 		pinctrl_lcdif_ctrl_0: lcdifctrlgrp-0 {
 			fsl,pins = <
-				MX6SX_PAD_LCD1_CLK__LCDIF1_CLK	0x1b0b0
-				MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x1b0b0
-				MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x1b0b0
-				MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x1b0b0
-				MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x1b0b0
+				MX6SX_PAD_LCD1_CLK__LCDIF1_CLK	0x4001b0b0
+				MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
+				MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
+				MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
+				MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
 			>;
 		};
 	};