diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-08-30 15:09:18 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-08-30 15:09:18 +0200 |
| commit | 05c8e7725952c56c60c702273c78959ec89338e7 (patch) | |
| tree | 5d48eebc28513e5cdb74a15392c045555ec8f353 /arch | |
| parent | 304fae6e8872c4b9d694900c5cef91abdbc81c7e (diff) | |
apalis/colibri_t30: fix HDMI hang issue
Initialisation of the framebuffer console on DVI-D aka HDMI sometimes
failed. This was particularly bad on Apalis T30 where this is activated
by default. On Colibri T30 this was observed when enabling it using the
fbcon=map:1 boot argument.
This fix curtsey of Bibek Basu from NVIDIA explicitly enables PLLA
during early clock initialisation which avoids a later race with the
display driver on DC1.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/board-apalis_t30.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/board-colibri_t30.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-apalis_t30.c b/arch/arm/mach-tegra/board-apalis_t30.c index 1f30b0c81554..88544ac1b201 100644 --- a/arch/arm/mach-tegra/board-apalis_t30.c +++ b/arch/arm/mach-tegra/board-apalis_t30.c @@ -220,6 +220,7 @@ static struct tegra_clk_init_table apalis_t30_clk_init_table[] __initdata = { {"i2s1", "pll_a_out0", 0, false}, {"i2s2", "pll_a_out0", 0, false}, {"i2s3", "pll_a_out0", 0, false}, + {"pll_a", NULL, 564480000, true}, {"pll_m", NULL, 0, false}, {"pwm", "pll_p", 3187500, false}, {"spdif_out", "pll_a_out0", 0, false}, diff --git a/arch/arm/mach-tegra/board-colibri_t30.c b/arch/arm/mach-tegra/board-colibri_t30.c index 52c048d7ba98..b6b2be98383e 100644 --- a/arch/arm/mach-tegra/board-colibri_t30.c +++ b/arch/arm/mach-tegra/board-colibri_t30.c @@ -278,6 +278,7 @@ static struct tegra_clk_init_table colibri_t30_clk_init_table[] __initdata = { {"i2s2", "pll_a_out0", 0, false}, {"i2s3", "pll_a_out0", 0, false}, {"nor", "pll_p", 86500000, true}, + {"pll_a", NULL, 564480000, true}, {"pll_m", NULL, 0, false}, {"pwm", "pll_p", 3187500, false}, {"spdif_out", "pll_a_out0", 0, false}, |