diff options
author | Peter Chen <peter.chen@nxp.com> | 2017-07-24 15:21:25 +0800 |
---|---|---|
committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
commit | 7d1d3c4bae901d6fb72bfaaa928211f57491657b (patch) | |
tree | 40287e78b0965e8452f4bab14cc20b04f8274ba3 /arch | |
parent | 2745264b15ef662c0cf193a5a2b066c86dda286e (diff) |
MLK-16065-3 ARM64: dts: fsl-imx8qxp-lpddr4-arm2.dts: enable USB3 Type-C port
At imx8qxp arm2 board, the USB3 controller is at one Type-C port, and
the CC logic at this Type-C port is controlled by PTN5150. Enable
USB3 Type-C port at this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts index 33df177df4b8..b9d9d98b1add 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts @@ -277,6 +277,12 @@ >; }; + pinctrl_ptn5150: ptn5150 { + fsl,pins = < + SC_P_SPI0_CS1_LSIO_GPIO1_IO07 0x00000021 + >; + }; + pinctrl_lpi2c1: lpi1cgrp { fsl,pins = < SC_P_USB_SS3_TC1_ADMA_I2C1_SCL 0x06000020 @@ -585,6 +591,14 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpi2c1>; status = "okay"; + + typec_ptn5150: typec@3d { + compatible = "nxp,ptn5150"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ptn5150>; + reg = <0x3d>; + connect-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + }; }; &i2c3 { @@ -686,3 +700,9 @@ reset-gpio = <&gpio4 0 GPIO_ACTIVE_LOW>; status = "okay"; }; + +&usbotg3 { + dr_mode = "otg"; + extcon = <&typec_ptn5150>; + status = "okay"; +}; |