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authorTony Lindgren <tony@atomide.com>2013-09-13 12:09:57 -0700
committerBenoit Cousson <bcousson@baylibre.com>2013-09-18 11:14:42 +0200
commit775d2418f309052641d94c896f73dc779cf7ba1b (patch)
tree51a105509ee08e7fa3ccbcab6958fd73b6b81085 /arch
parent851320e3f33503f557135a7fef6da66a2f7eec55 (diff)
ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for blaze
Commit 76787b3b (ARM: OMAP2+: Remove board-4430sdp.c) removed legacy booting in favor of device tree based booting for 4430sdp. That caused the WLAN to stop working as the related .dts entries fell through the cracks. I don't have the "1283 PG 2.21 connectivity device" on my 4430sdp, but the earlier version of this patch was tested by Luciano Coelho. This version has left out the input logic for MMC CLK line compared to the earlier version as that is not bidirectional, and should be safe to do. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Luciano Coelho <luca@coelho.fi> Cc: Ruslan Bilovol <ruslan.bilovol@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts39
1 files changed, 38 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 7951b4ea500a..4f78380ecdb8 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -140,6 +140,19 @@
"DMic", "Digital Mic",
"Digital Mic", "Digital Mic1 Bias";
};
+
+ /* regulator for wl12xx on sdio5 */
+ wl12xx_vmmc: wl12xx_vmmc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&wl12xx_gpio>;
+ compatible = "regulator-fixed";
+ regulator-name = "vwl1271";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpio2 22 0>;
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
};
&omap4_pmx_wkup {
@@ -295,6 +308,26 @@
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
>;
};
+
+ /* wl12xx GPIO output for WLAN_EN */
+ wl12xx_gpio: pinmux_wl12xx_gpio {
+ pinctrl-single,pins = <
+ 0x3c (PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
+ >;
+ };
+
+ /* wl12xx GPIO inputs and SDIO pins */
+ wl12xx_pins: pinmux_wl12xx_pins {
+ pinctrl-single,pins = <
+ 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
+ 0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */
+ 0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */
+ 0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */
+ 0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */
+ 0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */
+ 0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */
+ >;
+ };
};
&i2c1 {
@@ -420,8 +453,12 @@
};
&mmc5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&wl12xx_pins>;
+ vmmc-supply = <&wl12xx_vmmc>;
+ non-removable;
bus-width = <4>;
- ti,non-removable;
+ cap-power-off-card;
};
&emif1 {