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authorNicolin Chen <b42378@freescale.com>2013-04-23 20:06:29 +0800
committerNicolin Chen <b42378@freescale.com>2013-04-24 14:13:26 +0800
commitff8d1e71b22575cd3cd598045a34bb072ef560a2 (patch)
treec6c8f1ab062663b977b158b781cf35522540b5fb /arch
parent6e894132fbe3b127b8309e35348430b10afa0662 (diff)
ENGR00260082 mx6sl_evk: Change wm8962's MCLK to 24MHz
The clock, output from wm8962's FLL, is sometimes inaccurate. This's because 26MHz is not quite stable for wm8962's internal FLL, So change to 24MHz, the value recommended by Wolfson, which has been used on SabreSD for quite a long time. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx6/board-mx6sl_evk.c10
1 files changed, 1 insertions, 9 deletions
diff --git a/arch/arm/mach-mx6/board-mx6sl_evk.c b/arch/arm/mach-mx6/board-mx6sl_evk.c
index 205caa67c96a..a2dfd4109977 100644
--- a/arch/arm/mach-mx6/board-mx6sl_evk.c
+++ b/arch/arm/mach-mx6/board-mx6sl_evk.c
@@ -539,15 +539,7 @@ static int mxc_wm8962_init(void)
return PTR_ERR(extern_audio_root);
}
- pll4 = clk_get(NULL, "pll4");
- if (IS_ERR(pll4)) {
- pr_err("can't get pll4 clock.\n");
- return PTR_ERR(pll4);
- }
-
- clk_set_parent(extern_audio_root, pll4);
-
- rate = clk_round_rate(extern_audio_root, 26000000);
+ rate = clk_round_rate(extern_audio_root, 24000000);
clk_set_rate(extern_audio_root, rate);
wm8962_data.sysclk = rate;