diff options
author | Dong Aisheng <b29396@freescale.com> | 2014-04-16 16:37:36 +0800 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2014-08-27 18:11:56 -0500 |
commit | 4b07536a25db281619ce249a46a71e0bb8a08a6b (patch) | |
tree | abf50ac50b6ee6b446432e01d8155076cc40a4f4 /arch | |
parent | 7f74034b62cb99b2496907f8ac3771e220ee8ce9 (diff) |
ENGR00309031-2 dts: imx6sx-sdb-emmc: add emmc support on uSDHC4
The eMMC interface is shared with uSDHC4 BOOT card slot and the eMMC chip is
DNP by default. User needs burn the eMMC chip onto the board manually and
do hw rework to enable eMMC signals.
We create a new dts imx6sx-sdb-emmc.dts for easy eMMC test after doing hw rework.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sx-sdb-emmc.dts | 30 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sx-sdb.dts | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 30 |
4 files changed, 61 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a1e0bf89c7bd..a2333a25d850 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -146,6 +146,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6sx-sdb.dtb \ imx6sx-sdb-lcdif1.dtb \ imx6sx-sdb-sai.dtb \ + imx6sx-sdb-emmc.dtb \ vf610-twr.dtb dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx23-olinuxino.dtb \ diff --git a/arch/arm/boot/dts/imx6sx-sdb-emmc.dts b/arch/arm/boot/dts/imx6sx-sdb-emmc.dts new file mode 100644 index 000000000000..5c5c32d99543 --- /dev/null +++ b/arch/arm/boot/dts/imx6sx-sdb-emmc.dts @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6sx-sdb.dts" + +/* + * The eMMC chip on imx6sx sdb board is DNP by default. + * Need do hw rework to burn the eMMC4.5 chip on the eMMC socket on uSDHC4 + * and connect eMMC signals as well as disconnect BOOT SD CARD slot signals + */ +&usdhc4 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc4_1>; + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>; + bus-width = <8>; + /* + * overwrite cd-gpios and wp-gpios since they are reused as eMMC DATA + * signals after rework + */ + cd-gpios = <>; + wp-gpios = <>; + non-removable; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts index 8ec2eeaada91..84e1ec52b62f 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dts +++ b/arch/arm/boot/dts/imx6sx-sdb.dts @@ -510,7 +510,6 @@ pinctrl-0 = <&pinctrl_usdhc4_2 &pinctrl_usdhc4_gpios>; cd-gpios = <&gpio6 21 0>; wp-gpios = <&gpio6 20 0>; - no-1-8-v; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index fddb524b8614..ec4167834831 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -1690,6 +1690,36 @@ >; }; + pinctrl_usdhc4_1_100mhz: usdhc4grp-1-100mhz { + fsl,pins = < + MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170b9 + MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100b9 + MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170b9 + MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170b9 + MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170b9 + MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170b9 + MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170b9 + MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170b9 + MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170b9 + MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc4_1_200mhz: usdhc4grp-1-200mhz { + fsl,pins = < + MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170f9 + MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100f9 + MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170f9 + MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170f9 + MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170f9 + MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170f9 + MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170f9 + MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170f9 + MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170f9 + MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170f9 + >; + }; + pinctrl_usdhc4_2: usdhc4grp-2 { fsl,pins = < MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059 |