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authorBo Yan <byan@nvidia.com>2012-07-24 10:03:39 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 12:14:04 -0700
commit3502f1dd94b1e793dad3dcea3349e05ca58346b5 (patch)
treea6fea336ceee8741363d587ffe91d53f9c491fe6 /chromeos
parent568d9d1af295880a0c1b42b977d3f6feb5912f90 (diff)
ARM: tegra: New macro name for LP2 timer config
The config macro TEGRA_LP2_ARM_TWD was defined when only Cortex-A9 was used in Tegra SoC, but the feature enabled by this configuration option is not just for Cortex-A9. In fact, any CPU with private timer can make use of this feature. Therefore, change macro name to a more generic one "TEGRA_LP2_CPU_TIMER" so it can be used with new CPU architecture (CortexA15) Change-Id: I6903dba056c554c72bb8d1416df90145a4043295 Signed-off-by: Bo Yan <byan@nvidia.com> Reviewed-on: http://git-master/r/118099 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Rebase-Id: R0da9d17d0281e91f5908099579b8eaaf4b01a024
Diffstat (limited to 'chromeos')
-rw-r--r--chromeos/config/armel/config.flavour.chromeos-tegra32
1 files changed, 1 insertions, 1 deletions
diff --git a/chromeos/config/armel/config.flavour.chromeos-tegra3 b/chromeos/config/armel/config.flavour.chromeos-tegra3
index 1b6f87579921..25dffee58518 100644
--- a/chromeos/config/armel/config.flavour.chromeos-tegra3
+++ b/chromeos/config/armel/config.flavour.chromeos-tegra3
@@ -105,7 +105,7 @@ CONFIG_TEGRA_EDP_LIMITS=y
CONFIG_TEGRA_EMC_TO_DDR_CLOCK=1
CONFIG_TEGRA_IOVMM_SMMU=y
# CONFIG_TEGRA_IOVMM_SMMU_SYSFS is not set
-CONFIG_TEGRA_LP2_ARM_TWD=y
+CONFIG_TEGRA_LP2_CPU_TIMER=y
# CONFIG_TEGRA_MC_EARLY_ACK is not set
CONFIG_TEGRA_PCI=y
CONFIG_TEGRA_PLLM_RESTRICTED=y