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authorOhad Ben-Cohen <ohad@wizery.com>2011-11-10 11:32:30 +0200
committerJoerg Roedel <joerg.roedel@amd.com>2011-11-10 11:40:38 +0100
commit6d1c56a9db48977942602a50e88eeb61a3e625eb (patch)
tree6d4f915676dde2f287ef5efed30f08ffe10eb28d /crypto/Makefile
parentaa3de9c05051ac26355276944789217040e38207 (diff)
iommu/intel: announce supported page sizes
Let the IOMMU core know we support arbitrary page sizes (as long as they're an order of 4KiB). This way the IOMMU core will retain the existing behavior we're used to; it will let us map regions that: - their size is an order of 4KiB - they are naturally aligned Note: Intel IOMMU hardware doesn't support arbitrary page sizes, but the driver does (it splits arbitrary-sized mappings into the pages supported by the hardware). To make everything simpler for now, though, this patch effectively tells the IOMMU core to keep giving this driver the same memory regions it did before, so nothing is changed as far as it's concerned. At this point, the page sizes announced remain static within the IOMMU core. To correctly utilize the pgsize-splitting of the IOMMU core by this driver, it seems that some core changes should still be done, because Intel's IOMMU page size capabilities seem to have the potential to be different between different DMA remapping devices. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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