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authorMarc Zyngier <marc.zyngier@arm.com>2014-01-15 12:50:23 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-05-17 09:53:51 -0700
commita21780f3306fbfcf83d860c39709a802f2cb4ddf (patch)
treefdd9cc1e7f91a58fd20e732eefb4d7cfbc3314c5 /crypto/ccm.c
parentc7eafc3238958efc27b28debe88dc43fb04a3c36 (diff)
arm64: KVM: flush VM pages before letting the guest enable caches
commit 9d218a1fcf4c6b759d442ef702842fae92e1ea61 upstream. When the guest runs with caches disabled (like in an early boot sequence, for example), all the writes are diectly going to RAM, bypassing the caches altogether. Once the MMU and caches are enabled, whatever sits in the cache becomes suddenly visible, which isn't what the guest expects. A way to avoid this potential disaster is to invalidate the cache when the MMU is being turned on. For this, we hook into the SCTLR_EL1 trapping code, and scan the stage-2 page tables, invalidating the pages/sections that have already been mapped in. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Cc: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'crypto/ccm.c')
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