diff options
| author | Yen Lin <yelin@nvidia.com> | 2011-07-28 13:42:41 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-08-23 14:35:22 -0700 |
| commit | a2af046e9a5cde22bae5bf515f2518a762db5730 (patch) | |
| tree | 828c7f8f6ea8b8834e093774ae6908d777f77d78 /drivers/ata | |
| parent | 43c6c47fe197302bdb5c1956e13fa9fe346e5b7c (diff) | |
arm: tegra: ahci/sata: ignore lockdet when enable PLL shutdown
This is a WAR to ignore lockdet (mapped in extended config space
register offset 0x550) before enabling pll shutdown.
Bug 701429, 674857
Change-Id: Id9a8077c66440a66443e9f4c1b7ff86726fab9b6
Reviewed-on: http://git-master/r/43766
Reviewed-by: Rhyland Klein <rklein@nvidia.com>
Tested-by: Yen Lin <yelin@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'drivers/ata')
| -rw-r--r-- | drivers/ata/ahci-tegra.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/ata/ahci-tegra.c b/drivers/ata/ahci-tegra.c index 1eb16503e426..2556ed76074f 100644 --- a/drivers/ata/ahci-tegra.c +++ b/drivers/ata/ahci-tegra.c @@ -95,6 +95,8 @@ static u32 tegra_ahci_idle_time = TEGRA_AHCI_DEFAULT_IDLE_TIME; #define POWER_GATE_SSTS_RESTORED_YES (1 << 23) #define POWER_GATE_SSTS_RESTORED_NO (0 << 23) +#define T_SATA0_DBG0_OFFSET 0x550 + #define T_SATA0_INDEX_OFFSET 0x680 #define SATA0_NONE_SELECTED 0 #define SATA0_CH1_SELECTED (1 << 0) @@ -713,6 +715,16 @@ static int tegra_ahci_controller_init(struct tegra_ahci_host_priv *tegra_hpriv) val &= ~PHY_USE_7BIT_ALIGN_DET_FOR_SPD_MASK; scfg_writel(val, T_SATA0_CFG_PHY_REG); + /* + * WAR: Before enabling SATA PLL shutdown, lockdet needs to be ignored. + * To ignore lockdet, T_SATA0_DBG0_OFFSET register bit 10 needs to + * be 1, and bit 8 needs to be 0. + */ + val = scfg_readl(T_SATA0_DBG0_OFFSET); + val |= (1 << 10); + val &= ~(1 << 8); + scfg_writel(val, T_SATA0_DBG0_OFFSET); + /* program class code and programming interface for AHCI */ val = scfg_readl(TEGRA_PRIVATE_AHCI_CC_BKDR_OVERRIDE); val |= TEGRA_PRIVATE_AHCI_CC_BKDR_OVERRIDE_EN; @@ -1011,6 +1023,7 @@ static u16 pg_save_config_registers[] = { 0x4B0, /* T_SATA0_CFG_GLUE */ 0x534, /* T_SATA0_PHY_CTRL */ 0x540, /* T_SATA0_CTRL */ + 0x550, /* T_SATA0_DBG0 */ 0x554 /* T_SATA0_LOW_POWER_COUNT */ }; |