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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-13 13:08:01 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-13 13:08:01 -0700
commit32f44d62e463f66307513e90c09b4ceeac13cc22 (patch)
treea0e0c33b3c9c4474787ebb007ff15d6600fb053f /drivers/char/hw_random/via-rng.c
parentf3ad116588151b3371ae4e092290e4f48e62b8bb (diff)
parent08ced854fc4a979d9e59ba01000bf96e7057cfbc (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (35 commits) hwrng: timeriomem - Fix potential oops (request_mem_region/__devinit) crypto: api - Use formatting of module name crypto: testmgr - Allow hash test vectors longer than a page crypto: testmgr - Check all test vector lengths crypto: hifn_795x - fix __dev{init,exit} markings crypto: tcrypt - Do not exit on success in fips mode crypto: compress - Return produced bytes in crypto_{,de}compress_{update,final} hwrng: via_rng - Support VIA Nano hardware RNG on X86_64 builds hwrng: via_rng - Support VIA Nano hardware RNG hwrng: via_rng - The VIA Hardware RNG driver is for the CPU, not Chipset crypto: testmgr - Skip algs not flagged fips_allowed in fips mode crypto: testmgr - Mark algs allowed in fips mode crypto: testmgr - Add ctr(aes) test vectors crypto: testmgr - Dynamically allocate xbuf and axbuf crypto: testmgr - Print self-test pass notices in fips mode crypto: testmgr - Catch base cipher self-test failures in fips mode crypto: testmgr - Add ansi_cprng test vectors crypto: testmgr - Add infrastructure for ansi_cprng self-tests crypto: testmgr - Add self-tests for rfc4309(ccm(aes)) crypto: testmgr - Handle AEAD test vectors expected to fail verification ...
Diffstat (limited to 'drivers/char/hw_random/via-rng.c')
-rw-r--r--drivers/char/hw_random/via-rng.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index 4e9573c1d39e..794aacb715c1 100644
--- a/drivers/char/hw_random/via-rng.c
+++ b/drivers/char/hw_random/via-rng.c
@@ -132,6 +132,19 @@ static int via_rng_init(struct hwrng *rng)
struct cpuinfo_x86 *c = &cpu_data(0);
u32 lo, hi, old_lo;
+ /* VIA Nano CPUs don't have the MSR_VIA_RNG anymore. The RNG
+ * is always enabled if CPUID rng_en is set. There is no
+ * RNG configuration like it used to be the case in this
+ * register */
+ if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
+ if (!cpu_has_xstore_enabled) {
+ printk(KERN_ERR PFX "can't enable hardware RNG "
+ "if XSTORE is not enabled\n");
+ return -ENODEV;
+ }
+ return 0;
+ }
+
/* Control the RNG via MSR. Tread lightly and pay very close
* close attention to values written, as the reserved fields
* are documented to be "undefined and unpredictable"; but it
@@ -205,5 +218,5 @@ static void __exit mod_exit(void)
module_init(mod_init);
module_exit(mod_exit);
-MODULE_DESCRIPTION("H/W RNG driver for VIA chipsets");
+MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
MODULE_LICENSE("GPL");