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authorHeiko Stübner <heiko@sntech.de>2013-06-13 16:59:40 +0200
committerMike Turquette <mturquette@linaro.org>2013-06-20 15:58:27 -0700
commit646572c77db7c42beb3d091915c8f97359100c47 (patch)
tree9aa0cf08d01b21c4ffcf796177970c38561479d6 /drivers/clk/Makefile
parentc7f6e2d8ffce43e753c930bcb8b2230a321843af (diff)
clk: add support for Rockchip gate clocks
This adds basic support for gate-clocks on Rockchip SoCs. There are 16 gates in each register and use the HIWORD_MASK mechanism for changing gate settings. The gate registers form a continuos block which makes the dt node structure a matter of taste, as either all 160 gates can be put into one gate clock spanning all registers or they can be divided into the 10 individual gates containing 16 clocks each. The code supports both approaches. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/Makefile')
-rw-r--r--drivers/clk/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index f51b52b6651a..2e2e957ccfb7 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -25,6 +25,7 @@ ifeq ($(CONFIG_COMMON_CLK), y)
obj-$(CONFIG_ARCH_MMP) += mmp/
endif
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
obj-$(CONFIG_ARCH_U8500) += ux500/
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o