diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-23 18:56:08 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-23 18:56:08 -0800 |
commit | 7e21774db5cc9cf8fe93a64a2f0c6cf47db8ab24 (patch) | |
tree | 460812792bc3b23789a83968b7bad840cc3eb047 /drivers/clk/clk.h | |
parent | 0ba3307a8ec35252f7b1e222e32889a6f3d9ceb3 (diff) | |
parent | 2e84d75116c17c2034e917b411250d2d11755435 (diff) |
Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux
Pull clk framework changes from Mike Turquette:
"The first half of the clk framework pull request is made up almost
entirely of new platform/driver support. There are some conversions
of existing drivers to the common-clock Device Tree binding, and a few
non-critical fixes to the framework.
Due to an entirely unnecessary cyclical dependency with the arm-soc
tree this pull request is broken into two pieces. The second piece
will be sent out after arm-soc sends you the pull request that merged
in core support for the HiSilicon 3620 platform. That same pull
request from arm-soc depends on this pull request to merge in those
HiSilicon bits without causing build failures"
[ Just did the ARM SoC merges, so getting ready for the second clk tree
pull request - Linus ]
* tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux: (97 commits)
devicetree: bindings: Document qcom,mmcc
devicetree: bindings: Document qcom,gcc
clk: qcom: Add support for MSM8660's global clock controller (GCC)
clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)
clk: qcom: Add support for MSM8974's global clock controller (GCC)
clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)
clk: qcom: Add support for MSM8960's global clock controller (GCC)
clk: qcom: Add reset controller support
clk: qcom: Add support for branches/gate clocks
clk: qcom: Add support for root clock generators (RCGs)
clk: qcom: Add support for phase locked loops (PLLs)
clk: qcom: Add a regmap type clock struct
clk: Add set_rate_and_parent() op
reset: Silence warning in reset-controller.h
clk: sirf: re-arch to make the codes support both prima2 and atlas6
clk: composite: pass mux_hw into determine_rate
clk: shmobile: Fix MSTP clock array initialization
clk: shmobile: Fix MSTP clock index
ARM: dts: Add clock provider specific properties to max77686 node
clk: max77686: Register OF clock provider
...
Diffstat (limited to 'drivers/clk/clk.h')
-rw-r--r-- | drivers/clk/clk.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h new file mode 100644 index 000000000000..795cc9f0dac0 --- /dev/null +++ b/drivers/clk/clk.h @@ -0,0 +1,16 @@ +/* + * linux/drivers/clk/clk.h + * + * Copyright (C) 2013 Samsung Electronics Co., Ltd. + * Sylwester Nawrocki <s.nawrocki@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) +struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec); +void of_clk_lock(void); +void of_clk_unlock(void); +#endif |