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authorSachin Kamat <sachin.kamat@linaro.org>2013-12-19 14:03:39 +0530
committerTomasz Figa <t.figa@samsung.com>2013-12-30 18:43:28 +0100
commite86ffc4199c6004274cb4a169c7f84cc489532d4 (patch)
tree729e906f3d97496cc95c74c2fd74a09ad343100d /drivers/clk/samsung
parent96987ded8fd6e4b19fdac69950acfaeccd681952 (diff)
clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll
Add CLK_SET_RATE_PARENT flag to mout_apll clock. This will let us set the clock rate in the cpufreq driver. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'drivers/clk/samsung')
-rw-r--r--drivers/clk/samsung/clk-exynos5250.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index d54f4212d4e9..cbbe423d4e2b 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -262,7 +262,8 @@ static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = {
/*
* CMU_CPU
*/
- MUX_A(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, "mout_apll"),
+ MUX_FA(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
+ CLK_SET_RATE_PARENT, 0, "mout_apll"),
MUX_A(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"),
/*