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authorVishnu Patekar <vishnupatekar0510@gmail.com>2016-01-31 09:20:55 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-02-02 14:14:24 +0100
commitbe338e4c589935a95f09022566ec6c511c07bb8c (patch)
tree0217cf45c688d55cc03e712a28916ac4a2636ab2 /drivers/clk/sunxi/clk-sun8i-bus-gates.c
parent2d6f5f0cf6bfb17b8f0102cabe0665098ce0a865 (diff)
clk: sunxi: add bus gates for A83T
A83T has similar bus gates that of H3, including single gating register has different clock parent. As per H3 and A83T datasheet, usbhost is under AHB2. However,below shows allwinner source code assignment: bits: 26 (ehci0), 27 (ehci1), 29 (ohci0) => AHB1 for A83T. bits: 26 (ehci0), 27 (ehci1) => AHB1 for H3 bits 29, 30, 31(ohci0,1,2) => AHB2 for H3. until, this confusion is cleared keep it H3 way. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi/clk-sun8i-bus-gates.c')
-rw-r--r--drivers/clk/sunxi/clk-sun8i-bus-gates.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/clk-sun8i-bus-gates.c b/drivers/clk/sunxi/clk-sun8i-bus-gates.c
index 1113eb98c9b4..63fdb790df29 100644
--- a/drivers/clk/sunxi/clk-sun8i-bus-gates.c
+++ b/drivers/clk/sunxi/clk-sun8i-bus-gates.c
@@ -109,3 +109,5 @@ err_unmap:
CLK_OF_DECLARE(sun8i_h3_bus_gates, "allwinner,sun8i-h3-bus-gates-clk",
sun8i_h3_bus_gates_init);
+CLK_OF_DECLARE(sun8i_a83t_bus_gates, "allwinner,sun8i-a83t-bus-gates-clk",
+ sun8i_h3_bus_gates_init);