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authorStephen Boyd <sboyd@kernel.org>2018-06-04 12:35:59 -0700
committerStephen Boyd <sboyd@kernel.org>2018-06-04 12:35:59 -0700
commita74271a50782cd93a155144b6e8fb2a18175216c (patch)
treec5a01756b42d3cd2b5ccc7b4345dd322118e5e04 /drivers/clk
parent77122d6f7477899ba6d1b2d340956bd6fd9ee3b5 (diff)
parent12d807cd34b8620a531f7871979242834039a5dd (diff)
Merge branch 'clk-qcom-8996-halt' into clk-next
* clk-qcom-8996-halt: clk: qcom: gcc-msm8996: Disable halt check on UFS clocks clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/qcom/gcc-msm8996.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index 90ac99389075..9f35b3fe1d97 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -1418,6 +1418,7 @@ static struct clk_branch gcc_usb3_phy_aux_clk = {
static struct clk_branch gcc_usb3_phy_pipe_clk = {
.halt_reg = 0x50004,
+ .halt_check = BRANCH_HALT_SKIP,
.clkr = {
.enable_reg = 0x50004,
.enable_mask = BIT(0),
@@ -2472,6 +2473,7 @@ static struct clk_branch gcc_pcie_0_aux_clk = {
static struct clk_branch gcc_pcie_0_pipe_clk = {
.halt_reg = 0x6b018,
+ .halt_check = BRANCH_HALT_SKIP,
.clkr = {
.enable_reg = 0x6b018,
.enable_mask = BIT(0),
@@ -2547,6 +2549,7 @@ static struct clk_branch gcc_pcie_1_aux_clk = {
static struct clk_branch gcc_pcie_1_pipe_clk = {
.halt_reg = 0x6d018,
+ .halt_check = BRANCH_HALT_SKIP,
.clkr = {
.enable_reg = 0x6d018,
.enable_mask = BIT(0),
@@ -2622,6 +2625,7 @@ static struct clk_branch gcc_pcie_2_aux_clk = {
static struct clk_branch gcc_pcie_2_pipe_clk = {
.halt_reg = 0x6e018,
+ .halt_check = BRANCH_HALT_SKIP,
.clkr = {
.enable_reg = 0x6e018,
.enable_mask = BIT(0),
@@ -2792,6 +2796,7 @@ static struct clk_branch gcc_ufs_tx_symbol_0_clk = {
static struct clk_branch gcc_ufs_rx_symbol_0_clk = {
.halt_reg = 0x7501c,
+ .halt_check = BRANCH_HALT_SKIP,
.clkr = {
.enable_reg = 0x7501c,
.enable_mask = BIT(0),
@@ -2807,6 +2812,7 @@ static struct clk_branch gcc_ufs_rx_symbol_0_clk = {
static struct clk_branch gcc_ufs_rx_symbol_1_clk = {
.halt_reg = 0x75020,
+ .halt_check = BRANCH_HALT_SKIP,
.clkr = {
.enable_reg = 0x75020,
.enable_mask = BIT(0),