diff options
| author | Liu Ying <victor.liu@nxp.com> | 2019-10-16 13:22:25 +0800 |
|---|---|---|
| committer | Liu Ying <victor.liu@nxp.com> | 2020-02-13 12:06:42 +0800 |
| commit | 93bdb133653437d6a0a519bf04ac0066a97f4605 (patch) | |
| tree | 850e6ce52b7508c7656f5ece3cdae5de7a590175 /drivers/clk | |
| parent | 6036be34571b99516ef9ecd0ff0deddfae1ec224 (diff) | |
MLK-23252-1 clk: imx8mp: Add DISP2 pixel clock
This patch adds DISP2 pixel clock for the second instance of LCDIFv3
in the MEDIAMIX subsystem.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/imx/clk-imx8mp.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index 7f11b83aedc6..4d68292b2013 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -212,6 +212,10 @@ static const char *imx8mp_mipi_dsi_esc_rx_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out", "clk_ext3", "audio_pll2_out", }; +static const char *imx8mp_media_disp2_pix_sels[] = {"osc_24m", "video_pll1_out", "audio_pll2_out", + "audio_pll1_out", "sys_pll1_800m", "sys_pll2_1000m", + "sys_pll3_out", "clk_ext4", }; + static const char *imx8mp_dram_alt_sels[] = {"osc_24m", "sys_pll1_800m", "sys_pll1_100m", "sys_pll2_500m", "sys_pll2_1000m", "sys_pll3_out", "audio_pll1_out", "sys_pll1_266m", }; @@ -679,6 +683,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) clks[IMX8MP_CLK_AHB] = imx8m_clk_composite_critical("ahb_root", imx8mp_ahb_sels, base + 0x9000); clks[IMX8MP_CLK_AUDIO_AHB] = imx8m_clk_composite("audio_ahb", imx8mp_audio_ahb_sels, base + 0x9100); clks[IMX8MP_CLK_MIPI_DSI_ESC_RX] = imx8m_clk_composite("mipi_dsi_esc_rx", imx8mp_mipi_dsi_esc_rx_sels, base + 0x9200); + clks[IMX8MP_CLK_MEDIA_DISP2_PIX] = imx8m_clk_composite("media_disp2_pix", imx8mp_media_disp2_pix_sels, base + 0x9300); /* IPG */ clks[IMX8MP_CLK_IPG_ROOT] = imx_clk_divider2("ipg_root", "ahb_root", base + 0x9080, 0, 1); |