diff options
| author | Peng Fan <peng.fan@nxp.com> | 2020-01-19 10:12:46 +0000 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2020-02-10 10:24:00 +0800 |
| commit | ae20951b8a1bb6028a61b5e1e1bee15fc51258d2 (patch) | |
| tree | 85b5ad41caa665e80d7822da9af57f08b86a5e54 /drivers/clk | |
| parent | a9fdc3c84f493406e9a1754df2a28d334604b020 (diff) | |
MLK-23285-4 clk: imx: imx8mp: add ocotp root clk
Add ocotp root clk, then when using nvmem to read fuse, clk
could be managed.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/imx/clk-imx8mp.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index 84a7af135de5..7f11b83aedc6 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -782,6 +782,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) clks[IMX8MP_CLK_I2C3_ROOT] = imx_clk_gate4("i2c3_root_clk", "i2c3", base + 0x4190, 0); clks[IMX8MP_CLK_I2C4_ROOT] = imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0); clks[IMX8MP_CLK_MU_ROOT] = imx_clk_gate4("mu_root_clk", "ipg_root", base + 0x4210, 0); + clks[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_gate4("ocotp_root_clk", "ipg_root", base + 0x4220, 0); clks[IMX8MP_CLK_PCIE_ROOT] = imx_clk_gate4("pcie_root_clk", "pcie_aux", base + 0x4250, 0); clks[IMX8MP_CLK_PWM1_ROOT] = imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0); clks[IMX8MP_CLK_PWM2_ROOT] = imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0); |