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authorMarian Mihailescu <mihailescu2m@gmail.com>2019-10-29 11:20:25 +1030
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2020-01-23 08:18:37 +0100
commitf526c55f3f54e3f148da946d573e15aa03daa9ae (patch)
tree80f4ad28c157168ee9b59ef925294c2b8ad82ada /drivers/clk
parent855577aee5fa463cab9acddf9a7d6e60117e9d8d (diff)
clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/resume
commit e21be0d1d7bd7f78a77613f6bcb6965e72b22fc1 upstream. Save and restore top PLL related configuration registers for big (APLL) and LITTLE (KPLL) cores during suspend/resume cycle. So far, CPU clocks were reset to default values after suspend/resume cycle and performance after system resume was affected when performance governor has been selected. Fixes: 773424326b51 ("clk: samsung: exynos5420: add more registers to restore list") Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/samsung/clk-exynos5420.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index c94de13ce362..21bfedf40478 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -166,6 +166,8 @@ static unsigned long exynos5x_clk_regs[] __initdata = {
GATE_BUS_CPU,
GATE_SCLK_CPU,
CLKOUT_CMU_CPU,
+ APLL_CON0,
+ KPLL_CON0,
CPLL_CON0,
DPLL_CON0,
EPLL_CON0,