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authorBen Dooks <ben.dooks@codethink.co.uk>2014-03-31 18:47:27 +0100
committerMike Turquette <mturquette@linaro.org>2014-04-02 11:31:05 -0700
commite44df332f30bf3040c60c1ed6674d1431fdb48b9 (patch)
tree7b318ebf063fcbd9231a80f30eae3e2f23ae2c9d /drivers/clk
parent365b01869bca1c9d5ecb05be7857739fa18a9b8c (diff)
clk: shmobile: fix setting paretn clock rate
If the driver needs to change a clock rate, then it must be propogated through the MSTP clock to the parent clock (such as shdi0 -> sd0). Without this we cannot up-rate default clocks which are really slow (such as the mmcif1 which defaults to 12MHz where it could be running at 97MHz) Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/shmobile/clk-mstp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
index 42d5912b1d25..2e5810c88d11 100644
--- a/drivers/clk/shmobile/clk-mstp.c
+++ b/drivers/clk/shmobile/clk-mstp.c
@@ -137,7 +137,7 @@ cpg_mstp_clock_register(const char *name, const char *parent_name,
init.name = name;
init.ops = &cpg_mstp_clock_ops;
- init.flags = CLK_IS_BASIC;
+ init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT;
init.parent_names = &parent_name;
init.num_parents = 1;