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authorStephen Boyd <sboyd@codeaurora.org>2013-06-17 15:40:58 -0700
committerJohn Stultz <john.stultz@linaro.org>2013-06-17 15:56:11 -0700
commit336ae1180df5f69b9e0fb6561bec01c5f64361cf (patch)
tree416cd47092f970dd03e8b655d6204bd9fdc83e6f /drivers/clocksource/dw_apb_timer_of.c
parent38ff87f77af0b5a93fc8581cff1d6e5692ab8970 (diff)
ARM: sched_clock: Load cycle count after epoch stabilizes
There is a small race between when the cycle count is read from the hardware and when the epoch stabilizes. Consider this scenario: CPU0 CPU1 ---- ---- cyc = read_sched_clock() cyc_to_sched_clock() update_sched_clock() ... cd.epoch_cyc = cyc; epoch_cyc = cd.epoch_cyc; ... epoch_ns + cyc_to_ns((cyc - epoch_cyc) The cyc on cpu0 was read before the epoch changed. But we calculate the nanoseconds based on the new epoch by subtracting the new epoch from the old cycle count. Since epoch is most likely larger than the old cycle count we calculate a large number that will be converted to nanoseconds and added to epoch_ns, causing time to jump forward too much. Fix this problem by reading the hardware after the epoch has stabilized. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
Diffstat (limited to 'drivers/clocksource/dw_apb_timer_of.c')
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