diff options
| author | Magnus Damm <damm@opensource.se> | 2012-12-14 14:54:37 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-03-13 02:24:36 +0900 |
| commit | 118aee4dd91cf3c0b9546788ef66b65d3e9e31b1 (patch) | |
| tree | d0239755e781d6f6550e7d65ec0074d43ce3977d /drivers/clocksource/sh_cmt.c | |
| parent | cccd70455c351604d0a9075d35298ed4ff66dab3 (diff) | |
clocksource: sh_cmt: Add CMT register layout comment
Add a comment about different register layouts
supported by the CMT driver.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/clocksource/sh_cmt.c')
| -rw-r--r-- | drivers/clocksource/sh_cmt.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 7108963a6ab8..b72b7242125e 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -66,6 +66,21 @@ struct sh_cmt_priv { unsigned long value); }; +/* Examples of supported CMT timer register layouts and I/O access widths: + * + * "16-bit counter and 16-bit control" as found on sh7263: + * CMSTR 0xfffec000 16-bit + * CMCSR 0xfffec002 16-bit + * CMCNT 0xfffec004 16-bit + * CMCOR 0xfffec006 16-bit + * + * "32-bit counter and 16-bit control" as found on sh7372, sh73a0, r8a7740: + * CMSTR 0xffca0000 16-bit + * CMCSR 0xffca0060 16-bit + * CMCNT 0xffca0064 32-bit + * CMCOR 0xffca0068 32-bit + */ + static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs) { return ioread16(base + (offs << 1)); |