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author | Dirk Brandewie <dirk.j.brandewie@intel.com> | 2014-05-29 09:32:24 -0700 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2014-06-02 12:45:05 +0200 |
commit | c4ee841f602e5eef8eab673295c49c5b49d7732b (patch) | |
tree | b5ba45afb69212794a1fe53f215992413923e348 /drivers/cpufreq/speedstep-lib.h | |
parent | f0fe3cd7e12d8290c82284b5c8aee723cbd0371a (diff) |
intel_pstate: add sample time scaling
The PID assumes that samples are of equal time, which for a deferable
timers this is not true when the system goes idle. This causes the
PID to take a long time to converge to the min P state and depending
on the pattern of the idle load can make the P state appear stuck.
The hold-off value of three sample times before using the scaling is
to give a grace period for applications that have high performance
requirements and spend a lot of time idle, The poster child for this
behavior is the ffmpeg benchmark in the Phoronix test suite.
Cc: 3.14+ <stable@vger.kernel.org> # 3.14+
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/cpufreq/speedstep-lib.h')
0 files changed, 0 insertions, 0 deletions