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authorLeonard Crestez <leonard.crestez@nxp.com>2017-01-30 16:52:53 +0200
committerLeonard Crestez <leonard.crestez@nxp.com>2018-08-24 12:41:33 +0300
commit4141397bb25de8e839bd854a4370b91fff0fbe8e (patch)
tree28c09ea14f0f6c99192675add4d4f64f20ead102 /drivers/cpufreq
parent816409204866583574c2acd0a1d8233544658b18 (diff)
MLK-13843: Ensure PLL1 is bypassed before ARM-PODF is set
This is a missing piece of 99a978fbde34227a2ab2a3595446b757b5d7c3ab from linux-imx/imx_4.1.y. This fixes a hang on imx6sl when attempting to decrease cpufreq during late boot. This was found through tracing and comparing code with the imx_4.1.y branch
Diffstat (limited to 'drivers/cpufreq')
-rw-r--r--drivers/cpufreq/imx6q-cpufreq.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index 747e9dd94074..3c2a30f7d0ea 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -168,7 +168,16 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
clk_set_parent(pll1_sw_clk, step_clk);
if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk)) {
clk_set_rate(pll1_sys_clk, new_freq * 1000);
+
+ /* Ensure pll1_bypass is set back to pll1. */
+ clk_set_parent(pll1_bypass, pll1);
clk_set_parent(pll1_sw_clk, pll1_sys_clk);
+ } else {
+ /*
+ * Need to ensure that PLL1 is bypassed and enabled
+ * before ARM-PODF is set.
+ */
+ clk_set_parent(pll1_bypass, pll1_bypass_src);
}
}