MLK-18082: Reduce code diff with last commit

The organization of functions of the CAAM driver changed
between 4.9 and 4.14 so this arrangement allow to see
more clearly the changes later in the tree.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>

1 files changed, 258 insertions, 261 deletions

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 354f7a1ebcb1..9c8a89748199 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -28,17 +28,20 @@ EXPORT_SYMBOL(caam_imx);
 #include "qi.h"
 #endif
 
+/* Forward declarations of the functions in order of appearance */
+static inline struct clk *caam_drv_identify_clk(struct device *dev,
+						char *clk_name);
 static int caam_remove(struct platform_device *pdev);
 static void detect_era(struct caam_drv_private *ctrlpriv);
 static void handle_imx6_err005766(struct caam_drv_private *ctrlpriv);
-static int caam_probe(struct platform_device *pdev);
-static void init_debugfs(struct caam_drv_private *ctrlpriv);
 static int init_clocks(struct caam_drv_private *ctrlpriv);
+static int caam_probe(struct platform_device *pdev);
 static void check_virt(struct caam_drv_private *ctrlpriv, u32 comp_params);
 static int enable_jobrings(struct caam_drv_private *ctrlpriv, int block_offset);
 static void enable_qi(struct caam_drv_private *ctrlpriv, int block_offset);
 static int read_first_jr_index(struct caam_drv_private *ctrlpriv);
 static int probe_w_seco(struct caam_drv_private *ctrlpriv);
+static void init_debugfs(struct caam_drv_private *ctrlpriv);
 
 /*
  * i.MX targets tend to have clock control subsystems that can
@@ -206,100 +209,6 @@ static void handle_imx6_err005766(struct caam_drv_private *ctrlpriv)
 	}
 }
 
-static void init_debugfs(struct caam_drv_private *ctrlpriv)
-{
-#ifdef CONFIG_DEBUG_FS
-	struct caam_perfmon *perfmon;
-
-	/*
-	 * FIXME: needs better naming distinction, as some amalgamation of
-	 * "caam" and nprop->full_name. The OF name isn't distinctive,
-	 * but does separate instances
-	 */
-	perfmon = (struct caam_perfmon __force *)&ctrlpriv->ctrl->perfmon;
-
-	ctrlpriv->dfs_root = debugfs_create_dir(dev_name(ctrlpriv->dev), NULL);
-	ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
-
-	/* Controller-level - performance monitor counters */
-
-	ctrlpriv->ctl_rq_dequeued =
-		debugfs_create_file("rq_dequeued",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->req_dequeued,
-				    &caam_fops_u64_ro);
-	ctrlpriv->ctl_ob_enc_req =
-		debugfs_create_file("ob_rq_encrypted",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->ob_enc_req,
-				    &caam_fops_u64_ro);
-	ctrlpriv->ctl_ib_dec_req =
-		debugfs_create_file("ib_rq_decrypted",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->ib_dec_req,
-				    &caam_fops_u64_ro);
-	ctrlpriv->ctl_ob_enc_bytes =
-		debugfs_create_file("ob_bytes_encrypted",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->ob_enc_bytes,
-				    &caam_fops_u64_ro);
-	ctrlpriv->ctl_ob_prot_bytes =
-		debugfs_create_file("ob_bytes_protected",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->ob_prot_bytes,
-				    &caam_fops_u64_ro);
-	ctrlpriv->ctl_ib_dec_bytes =
-		debugfs_create_file("ib_bytes_decrypted",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->ib_dec_bytes,
-				    &caam_fops_u64_ro);
-	ctrlpriv->ctl_ib_valid_bytes =
-		debugfs_create_file("ib_bytes_validated",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->ib_valid_bytes,
-				    &caam_fops_u64_ro);
-
-	/* Controller level - global status values */
-	ctrlpriv->ctl_faultaddr =
-		debugfs_create_file("fault_addr",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->faultaddr,
-				    &caam_fops_u32_ro);
-	ctrlpriv->ctl_faultdetail =
-		debugfs_create_file("fault_detail",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->faultdetail,
-				    &caam_fops_u32_ro);
-	ctrlpriv->ctl_faultstatus =
-		debugfs_create_file("fault_status",
-				    0444,
-				    ctrlpriv->ctl, &perfmon->status,
-				    &caam_fops_u32_ro);
-
-	/* Internal covering keys (useful in non-secure mode only) */
-	ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
-	ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
-	ctrlpriv->ctl_kek = debugfs_create_blob("kek",
-						0444,
-						ctrlpriv->ctl,
-						&ctrlpriv->ctl_kek_wrap);
-
-	ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
-	ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
-	ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
-						 0444,
-						 ctrlpriv->ctl,
-						 &ctrlpriv->ctl_tkek_wrap);
-
-	ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
-	ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
-	ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
-						 0444,
-						 ctrlpriv->ctl,
-						 &ctrlpriv->ctl_tdsk_wrap);
-#endif
-}
-
 static int init_clocks(struct caam_drv_private *ctrlpriv)
 {
 	struct clk *clk;
@@ -311,28 +220,28 @@ static int init_clocks(struct caam_drv_private *ctrlpriv)
 	if (IS_ERR(clk)) {
 		ret = PTR_ERR(clk);
 		dev_err(dev, "can't identify CAAM ipg clk: %d\n", ret);
-		return ret;
+		goto exit;
 	}
 	ctrlpriv->caam_ipg = clk;
 
 	ret = clk_prepare_enable(ctrlpriv->caam_ipg);
 	if (ret < 0) {
 		dev_err(dev, "can't enable CAAM ipg clock: %d\n", ret);
-		return ret;
+		goto exit;
 	}
 
 	clk = caam_drv_identify_clk(dev, "aclk");
 	if (IS_ERR(clk)) {
 		ret = PTR_ERR(clk);
 		dev_err(dev, "can't identify CAAM aclk clk: %d\n", ret);
-		return ret;
+		goto disable_caam_ipg;
 	}
 	ctrlpriv->caam_aclk = clk;
 
 	ret = clk_prepare_enable(ctrlpriv->caam_aclk);
 	if (ret < 0) {
 		dev_err(dev, "can't enable CAAM aclk clock: %d\n", ret);
-		return ret;
+		goto disable_caam_ipg;
 	}
 
 	if (!(of_find_compatible_node(NULL, NULL, "fsl,imx7d-caam"))) {
@@ -340,7 +249,7 @@ static int init_clocks(struct caam_drv_private *ctrlpriv)
 		if (IS_ERR(clk)) {
 			ret = PTR_ERR(clk);
 			dev_err(dev, "can't identify CAAM mem clk: %d\n", ret);
-			return ret;
+			goto disable_caam_aclk;
 		}
 		ctrlpriv->caam_mem = clk;
 
@@ -348,7 +257,7 @@ static int init_clocks(struct caam_drv_private *ctrlpriv)
 		if (ret < 0) {
 			dev_err(dev, "can't enable CAAM secure mem clock: %d\n",
 				ret);
-			return ret;
+			goto disable_caam_aclk;
 		}
 
 		if (!(of_find_compatible_node(NULL, NULL, "fsl,imx6ul-caam"))) {
@@ -358,7 +267,7 @@ static int init_clocks(struct caam_drv_private *ctrlpriv)
 				dev_err(dev,
 					"can't identify CAAM emi_slow clk: %d\n",
 					ret);
-				return ret;
+				goto disable_caam_mem;
 			}
 			ctrlpriv->caam_emi_slow = clk;
 
@@ -367,11 +276,190 @@ static int init_clocks(struct caam_drv_private *ctrlpriv)
 				dev_err(dev,
 					"can't enable CAAM emi slow clock: %d\n",
 					ret);
-				return ret;
+				goto disable_caam_mem;
 			}
 		}
 	}
 
+	goto exit;
+
+disable_caam_mem:
+	clk_disable_unprepare(ctrlpriv->caam_mem);
+disable_caam_aclk:
+	clk_disable_unprepare(ctrlpriv->caam_aclk);
+disable_caam_ipg:
+	clk_disable_unprepare(ctrlpriv->caam_ipg);
+exit:
+	return ret;
+}
+
+/* Probe routine for CAAM top (controller) level */
+static int caam_probe(struct platform_device *pdev)
+{
+	int ret;
+	u64 caam_id;
+	static const struct soc_device_attribute imx_soc[] = {
+		{.family = "Freescale i.MX"},
+		{},
+	};
+	struct device *dev;
+	struct device_node *nprop, *np;
+	struct caam_ctrl __iomem *ctrl;
+	struct caam_drv_private *ctrlpriv;
+	u32 comp_params;
+	int pg_size;
+	int block_offset = 0;
+
+	ctrlpriv = devm_kzalloc(&pdev->dev, sizeof(*ctrlpriv), GFP_KERNEL);
+	if (!ctrlpriv)
+		return -ENOMEM;
+
+	dev = &pdev->dev;
+	dev_set_drvdata(dev, ctrlpriv);
+	ctrlpriv->dev = dev;
+	ctrlpriv->pdev = pdev;
+	nprop = pdev->dev.of_node;
+
+	caam_imx = (bool)soc_device_match(imx_soc);
+
+	if (!of_machine_is_compatible("fsl,imx8mq") &&
+	     !of_machine_is_compatible("fsl,imx8qm") &&
+	     !of_machine_is_compatible("fsl,imx8qxp")) {
+		ret = init_clocks(ctrlpriv);
+		if (ret)
+			goto disable_clocks;
+	}
+	/* Get configuration properties from device tree */
+	/* First, get register page */
+	ctrl = of_iomap(nprop, 0);
+	if (ctrl == NULL) {
+		dev_err(dev, "caam: of_iomap() failed\n");
+		ret = -ENOMEM;
+		goto disable_clocks;
+	}
+	ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
+
+	if (of_machine_is_compatible("fsl,imx8qm") ||
+		 of_machine_is_compatible("fsl,imx8qxp")) {
+		ret = probe_w_seco(ctrlpriv);
+		if (ret)
+			goto iounmap_ctrl;
+		return ret;
+	}
+
+	ctrlpriv->has_seco = false;
+
+	caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &
+				  (CSTA_PLEND | CSTA_ALT_PLEND));
+
+	/* Finding the page size for using the CTPR_MS register */
+	comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);
+	pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;
+
+	/* Allocating the block_offset based on the supported page size on
+	 * the platform
+	 */
+	if (pg_size == 0)
+		block_offset = PG_SIZE_4K;
+	else
+		block_offset = PG_SIZE_64K;
+
+	ctrlpriv->assure = (struct caam_assurance __iomem __force *)
+			   ((__force uint8_t *)ctrl +
+			    block_offset * ASSURE_BLOCK_NUMBER);
+	ctrlpriv->deco = (struct caam_deco __iomem __force *)
+			 ((__force uint8_t *)ctrl +
+			 block_offset * DECO_BLOCK_NUMBER);
+
+	detect_era(ctrlpriv);
+
+	/* Get CAAM-SM node and of_iomap() and save */
+	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-caam-sm");
+	if (!np) {
+		ret = -ENODEV;
+		goto disable_clocks;
+	}
+
+	ctrlpriv->sm_base = of_iomap(np, 0);
+	if (!of_machine_is_compatible("fsl,imx8mq") &&
+	    !of_machine_is_compatible("fsl,imx8qm") &&
+	    !of_machine_is_compatible("fsl,imx8qxp")) {
+		ctrlpriv->sm_size = 0x3fff;
+	} else {
+		ctrlpriv->sm_size = PG_SIZE_64K;
+	}
+
+	/*
+	 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
+	 * long pointers in master configuration register.
+	 * In case of DPAA 2.x, Management Complex firmware performs
+	 * the configuration.
+	 */
+	caam_dpaa2 = !!(comp_params & CTPR_MS_DPAA2);
+	if (!caam_dpaa2)
+		clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK | MCFGR_LONG_PTR,
+			      MCFGR_AWCACHE_CACH | MCFGR_AWCACHE_BUFF |
+			      MCFGR_WDENABLE | MCFGR_LARGE_BURST |
+			      (sizeof(dma_addr_t) == sizeof(u64) ?
+			       MCFGR_LONG_PTR : 0));
+
+	handle_imx6_err005766(ctrlpriv);
+
+	check_virt(ctrlpriv, comp_params);
+
+	/* Set DMA masks according to platform ranging */
+	if (sizeof(dma_addr_t) == sizeof(u64))
+		if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
+			dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
+		else
+			dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36));
+	else
+		dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
+
+	ret = enable_jobrings(ctrlpriv, block_offset);
+	if (ret)
+		goto iounmap_ctrl;
+
+	enable_qi(ctrlpriv, block_offset);
+
+	/* If no QI and no rings specified, quit and go home */
+	if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
+		dev_err(dev, "no queues configured, terminating\n");
+		ret = -ENOMEM;
+		goto caam_remove;
+	}
+
+	/* NOTE: RTIC detection ought to go here, around Si time */
+
+	caam_id = (u64)rd_reg32(&ctrl->perfmon.caam_id_ms) << 32 |
+		  (u64)rd_reg32(&ctrl->perfmon.caam_id_ls);
+
+	dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
+		 ctrlpriv->era);
+	dev_info(dev, "job rings = %d, qi = %d, dpaa2 = %s\n",
+		 ctrlpriv->total_jobrs, ctrlpriv->qi_present,
+		 caam_dpaa2 ? "yes" : "no");
+
+	init_debugfs(ctrlpriv);
+
+	return 0;
+
+caam_remove:
+	caam_remove(pdev);
+	return ret;
+
+iounmap_ctrl:
+	iounmap(ctrl);
+disable_clocks:
+	if (!of_machine_is_compatible("fsl,imx8mq") &&
+		!of_machine_is_compatible("fsl,imx8qm") &&
+		!of_machine_is_compatible("fsl,imx8qxp")) {
+		clk_disable_unprepare(ctrlpriv->caam_emi_slow);
+		clk_disable_unprepare(ctrlpriv->caam_aclk);
+		clk_disable_unprepare(ctrlpriv->caam_mem);
+		clk_disable_unprepare(ctrlpriv->caam_ipg);
+	}
+
 	return ret;
 }
 
@@ -559,175 +647,84 @@ static int probe_w_seco(struct caam_drv_private *ctrlpriv)
 	return ret;
 }
 
-/* Probe routine for CAAM top (controller) level */
-static int caam_probe(struct platform_device *pdev)
+static void init_debugfs(struct caam_drv_private *ctrlpriv)
 {
-	int ret;
-	u64 caam_id;
-	static const struct soc_device_attribute imx_soc[] = {
-		{.family = "Freescale i.MX"},
-		{},
-	};
-	struct device *dev;
-	struct device_node *nprop, *np;
-	struct caam_ctrl __iomem *ctrl;
-	struct caam_drv_private *ctrlpriv;
-	u32 comp_params;
-	int pg_size;
-	int block_offset = 0;
-
-	ctrlpriv = devm_kzalloc(&pdev->dev, sizeof(*ctrlpriv), GFP_KERNEL);
-	if (!ctrlpriv)
-		return -ENOMEM;
-
-	dev = &pdev->dev;
-	dev_set_drvdata(dev, ctrlpriv);
-	ctrlpriv->dev = dev;
-	ctrlpriv->pdev = pdev;
-	nprop = pdev->dev.of_node;
-
-	caam_imx = (bool)soc_device_match(imx_soc);
-
-	if (!of_machine_is_compatible("fsl,imx8mq") &&
-	     !of_machine_is_compatible("fsl,imx8qm") &&
-	     !of_machine_is_compatible("fsl,imx8qxp")) {
-		ret = init_clocks(ctrlpriv);
-		if (ret)
-			goto disable_clocks;
-	}
-	/* Get configuration properties from device tree */
-	/* First, get register page */
-	ctrl = of_iomap(nprop, 0);
-	if (ctrl == NULL) {
-		dev_err(dev, "caam: of_iomap() failed\n");
-		ret = -ENOMEM;
-		goto disable_clocks;
-	}
-	ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
-
-	if (of_machine_is_compatible("fsl,imx8qm") ||
-		 of_machine_is_compatible("fsl,imx8qxp")) {
-		ret = probe_w_seco(ctrlpriv);
-		if (ret)
-			goto iounmap_ctrl;
-		return ret;
-	}
-
-	ctrlpriv->has_seco = false;
-
-	dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
-		 ctrlpriv->era);
-	dev_info(dev, "job rings = %d, qi = %d, dpaa2 = %s\n",
-		 ctrlpriv->total_jobrs, ctrlpriv->qi_present,
-		 caam_dpaa2 ? "yes" : "no");
-
-	caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &
-				  (CSTA_PLEND | CSTA_ALT_PLEND));
-
-	/* Finding the page size for using the CTPR_MS register */
-	comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);
-	pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;
-
-	/* Allocating the block_offset based on the supported page size on
-	 * the platform
+#ifdef CONFIG_DEBUG_FS
+	struct caam_perfmon *perfmon;
+	/* Read permission of the file created:
+	 *  - S_IRUSR (user): 0x400
+	 *  - S_IRGRP (group): 0x040
+	 *  - S_IROTH (other): 0x004
 	 */
-	if (pg_size == 0)
-		block_offset = PG_SIZE_4K;
-	else
-		block_offset = PG_SIZE_64K;
-
-	ctrlpriv->assure = (struct caam_assurance __force *)
-			   ((uint8_t *)ctrl +
-			    block_offset * ASSURE_BLOCK_NUMBER);
-	ctrlpriv->deco = (struct caam_deco __force *)
-			 ((uint8_t *)ctrl +
-			 block_offset * DECO_BLOCK_NUMBER);
-
-	detect_era(ctrlpriv);
-
-	/* Get CAAM-SM node and of_iomap() and save */
-	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-caam-sm");
-	if (!np) {
-		ret = -ENODEV;
-		goto disable_clocks;
-	}
-
-	ctrlpriv->sm_base = of_iomap(np, 0);
-	if (!of_machine_is_compatible("fsl,imx8mq") &&
-		!of_machine_is_compatible("fsl,imx8qm") &&
-		!of_machine_is_compatible("fsl,imx8qxp")) {
-		ctrlpriv->sm_size = 0x3fff;
-	} else {
-		ctrlpriv->sm_size = PG_SIZE_64K;
-	}
+	umode_t perm = 0x400 | 0x040 | 0x004;
 
 	/*
-	 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
-	 * long pointers in master configuration register
+	 * FIXME: needs better naming distinction, as some amalgamation of
+	 * "caam" and nprop->full_name. The OF name isn't distinctive,
+	 * but does separate instances
 	 */
-	clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK | MCFGR_LONG_PTR,
-		      MCFGR_AWCACHE_CACH | MCFGR_AWCACHE_BUFF |
-		      MCFGR_WDENABLE | MCFGR_LARGE_BURST |
-		      (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
-
-	handle_imx6_err005766(ctrlpriv);
-
-	check_virt(ctrlpriv, comp_params);
-
-	/* Set DMA masks according to platform ranging */
-	if (sizeof(dma_addr_t) == sizeof(u64))
-		if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
-			dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
-		else
-			dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36));
-	else
-		dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
-
-	ret = enable_jobrings(ctrlpriv, block_offset);
-	if (ret)
-		goto iounmap_ctrl;
-
-	enable_qi(ctrlpriv, block_offset);
-
-	/* If no QI and no rings specified, quit and go home */
-	if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
-		dev_err(dev, "no queues configured, terminating\n");
-		ret = -ENOMEM;
-		goto caam_remove;
-	}
-
-	/* NOTE: RTIC detection ought to go here, around Si time */
+	perfmon = (struct caam_perfmon __force *)&ctrlpriv->ctrl->perfmon;
 
-	caam_id = (u64)rd_reg32(&ctrl->perfmon.caam_id_ms) << 32 |
-		  (u64)rd_reg32(&ctrl->perfmon.caam_id_ls);
+	ctrlpriv->dfs_root = debugfs_create_dir(dev_name(ctrlpriv->dev), NULL);
+	ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
 
-	dev_info(dev, "device ID = 0x%016llx (Era %d)\n"
-			"job rings = %d, qi = %d\n",
-			caam_id,
-			ctrlpriv->era,
-			ctrlpriv->total_jobrs, ctrlpriv->qi_present);
+	/* Controller-level - performance monitor counters */
 
-	init_debugfs(ctrlpriv);
+	debugfs_create_file("rq_dequeued", perm,
+			    ctrlpriv->ctl, &perfmon->req_dequeued,
+			    &caam_fops_u64_ro);
+	debugfs_create_file("ob_rq_encrypted", perm,
+			    ctrlpriv->ctl, &perfmon->ob_enc_req,
+			    &caam_fops_u64_ro);
+	debugfs_create_file("ib_rq_decrypted", perm,
+			    ctrlpriv->ctl, &perfmon->ib_dec_req,
+			    &caam_fops_u64_ro);
+	debugfs_create_file("ob_bytes_encrypted", perm,
+			    ctrlpriv->ctl, &perfmon->ob_enc_bytes,
+			    &caam_fops_u64_ro);
+	debugfs_create_file("ob_bytes_protected", perm,
+			    ctrlpriv->ctl, &perfmon->ob_prot_bytes,
+			    &caam_fops_u64_ro);
+	debugfs_create_file("ib_bytes_decrypted", perm,
+			    ctrlpriv->ctl, &perfmon->ib_dec_bytes,
+			    &caam_fops_u64_ro);
+	debugfs_create_file("ib_bytes_validated", perm,
+			    ctrlpriv->ctl, &perfmon->ib_valid_bytes,
+			    &caam_fops_u64_ro);
 
-	return 0;
+	/* Controller level - global status values */
+	debugfs_create_file("fault_addr", perm,
+			    ctrlpriv->ctl, &perfmon->faultaddr,
+			    &caam_fops_u32_ro);
+	debugfs_create_file("fault_detail", perm,
+			    ctrlpriv->ctl, &perfmon->faultdetail,
+			    &caam_fops_u32_ro);
+	debugfs_create_file("fault_status", perm,
+			    ctrlpriv->ctl, &perfmon->status,
+			    &caam_fops_u32_ro);
 
-caam_remove:
-	caam_remove(pdev);
-	return ret;
+	/* Internal covering keys (useful in non-secure mode only) */
+	ctrlpriv->ctl_kek_wrap.data = (__force void *)&ctrlpriv->ctrl->kek[0];
+	ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
+	ctrlpriv->ctl_kek = debugfs_create_blob("kek",
+						perm,
+						ctrlpriv->ctl,
+						&ctrlpriv->ctl_kek_wrap);
 
-iounmap_ctrl:
-	iounmap(ctrl);
-disable_clocks:
-	if (!of_machine_is_compatible("fsl,imx8mq") &&
-		!of_machine_is_compatible("fsl,imx8qm") &&
-		!of_machine_is_compatible("fsl,imx8qxp")) {
-		clk_disable_unprepare(ctrlpriv->caam_emi_slow);
-		clk_disable_unprepare(ctrlpriv->caam_aclk);
-		clk_disable_unprepare(ctrlpriv->caam_mem);
-		clk_disable_unprepare(ctrlpriv->caam_ipg);
-	}
+	ctrlpriv->ctl_tkek_wrap.data = (__force void *)&ctrlpriv->ctrl->tkek[0];
+	ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
+	ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
+						 perm,
+						 ctrlpriv->ctl,
+						 &ctrlpriv->ctl_tkek_wrap);
 
-	return ret;
+	ctrlpriv->ctl_tdsk_wrap.data = (__force void *)&ctrlpriv->ctrl->tdsk[0];
+	ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
+	ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
+						 perm,
+						 ctrlpriv->ctl,
+						 &ctrlpriv->ctl_tdsk_wrap);
+#endif
 }
 
 static const struct of_device_id caam_match[] = {