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authorKevin Hilman <khilman@linaro.org>2013-12-20 08:59:04 -0800
committerKevin Hilman <khilman@linaro.org>2013-12-20 08:59:30 -0800
commit490b929d42d2a321887f9538a83fc9f215675f15 (patch)
tree04fe7161f92c568839605f92c8f1c8730216f739 /drivers/crypto/caam/intern.h
parent23621799f24c3c4e8e8dcdf5fdeb3ebd2be148f9 (diff)
parentef43eff3447f30b4a3cfc61813902c2e57c20245 (diff)
Merge branch 'efm32/soc' into next/soc
From Uwe Kleine-König: * efm32/soc: (1003 commits) ARM: device trees for Energy Micro's EFM32 Cortex-M3 SoCs ARM: new platform for Energy Micro's EFM32 Cortex-M3 SoCs +Linux 3.13-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'drivers/crypto/caam/intern.h')
-rw-r--r--drivers/crypto/caam/intern.h20
1 files changed, 11 insertions, 9 deletions
diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h
index 34c4b9f7fbfa..6d85fcc5bd0a 100644
--- a/drivers/crypto/caam/intern.h
+++ b/drivers/crypto/caam/intern.h
@@ -37,13 +37,16 @@ struct caam_jrentry_info {
/* Private sub-storage for a single JobR */
struct caam_drv_private_jr {
- struct device *parentdev; /* points back to controller dev */
- struct platform_device *jr_pdev;/* points to platform device for JR */
+ struct list_head list_node; /* Job Ring device list */
+ struct device *dev;
int ridx;
struct caam_job_ring __iomem *rregs; /* JobR's register space */
struct tasklet_struct irqtask;
int irq; /* One per queue */
+ /* Number of scatterlist crypt transforms active on the JobR */
+ atomic_t tfm_count ____cacheline_aligned;
+
/* Job ring info */
int ringsize; /* Size of rings (assume input = output) */
struct caam_jrentry_info *entinfo; /* Alloc'ed 1 per ring entry */
@@ -63,7 +66,7 @@ struct caam_drv_private_jr {
struct caam_drv_private {
struct device *dev;
- struct device **jrdev; /* Alloc'ed array per sub-device */
+ struct platform_device **jrpdev; /* Alloc'ed array per sub-device */
struct platform_device *pdev;
/* Physical-presence section */
@@ -80,12 +83,11 @@ struct caam_drv_private {
u8 qi_present; /* Nonzero if QI present in device */
int secvio_irq; /* Security violation interrupt number */
- /* which jr allocated to scatterlist crypto */
- atomic_t tfm_count ____cacheline_aligned;
- /* list of registered crypto algorithms (mk generic context handle?) */
- struct list_head alg_list;
- /* list of registered hash algorithms (mk generic context handle?) */
- struct list_head hash_list;
+#define RNG4_MAX_HANDLES 2
+ /* RNG4 block */
+ u32 rng4_sh_init; /* This bitmap shows which of the State
+ Handles of the RNG4 block are initialized
+ by this driver */
/*
* debugfs entries for developer view into driver/device