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authorVarun Wadekar <vwadekar@nvidia.com>2011-01-24 15:30:19 +0530
committerVarun Colbert <vcolbert@nvidia.com>2011-03-09 18:58:00 -0800
commit1c38a5dd52803ad1bfac92128ee8c7495bbb6fb0 (patch)
tree346f5c6c4e2a987ef8b6563256f30d5a02ff5a62 /drivers/crypto
parentb7ba1f04d33f50ae74fde9410ef2b0df36bd1a63 (diff)
crypto: tegra-aes: set vde clock to max in _probe
Change-Id: I41ba8dfc193b346eda522eadfb0f9035f4d838f8 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/22160 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/tegra-aes.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c
index 125658712e8c..028a220eb9b0 100644
--- a/drivers/crypto/tegra-aes.c
+++ b/drivers/crypto/tegra-aes.c
@@ -229,14 +229,6 @@ static int aes_hw_init(struct tegra_aes_dev *dd)
return ret;
}
- ret = clk_set_rate(dd->iclk, 240000000);
- if (ret) {
- dev_err(dd->dev, "%s: iclk set_rate fail(%d)\n", __func__, ret);
- clk_disable(dd->iclk);
- clk_disable(dd->pclk);
- return ret;
- }
-
aes_writel(dd, 0x33, INT_ENB);
return ret;
}
@@ -1001,6 +993,12 @@ static int tegra_aes_probe(struct platform_device *pdev)
goto out;
}
+ err = clk_set_rate(dd->iclk, ULONG_MAX);
+ if (err) {
+ dev_err(dd->dev, "iclk set_rate fail(%d)\n", err);
+ goto out;
+ }
+
/*
* the foll contiguous memory is allocated as follows -
* - hardware key table