diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2011-01-14 13:19:25 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-01-27 23:29:20 -0800 |
| commit | d376f33ad7faf7a2a468adfb3f49caffd5b96d36 (patch) | |
| tree | c4d5a869e6fbfbdca30d712442136f1046a39957 /drivers/crypto | |
| parent | 53033d91b76dbf1beecaba731e30d2b6918efff8 (diff) | |
crypto: tegra-aes: perf: remove unnecessary polling and memset
Change-Id: I69731fcd50933ccea73542d046c3c5d86d03fcd9
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/16707
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'drivers/crypto')
| -rw-r--r-- | drivers/crypto/tegra-aes.c | 32 |
1 files changed, 10 insertions, 22 deletions
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c index f7dd72964f0c..125658712e8c 100644 --- a/drivers/crypto/tegra-aes.c +++ b/drivers/crypto/tegra-aes.c @@ -337,13 +337,6 @@ static int aes_start_crypt(struct tegra_aes_dev *dd, u32 in_addr, u32 out_addr, } aes_writel(dd, cmdq[qlen - 1], ICMDQUE_WR); - do { - value = aes_readl(dd, INTR_STATUS); - eng_busy = value & (0x1); - icq_empty = value & (0x1<<3); - dma_busy = value & (0x1<<23); - } while (eng_busy & (!icq_empty) & dma_busy); - return 0; } @@ -419,15 +412,16 @@ static int aes_set_key(struct tegra_aes_dev *dd) (AES_HW_KEY_TABLE_LENGTH_BYTES/sizeof(u32)) << MEMDMABITSHIFT_NUM_WORDS; cmdq[1] = (u32)dd->ivkey_phys_base; - for (i = 0; i < ARRAY_SIZE(cmdq); i++) { + + for (i = 0; i < ARRAY_SIZE(cmdq); i++) aes_writel(dd, cmdq[i], ICMDQUE_WR); - do { - value = aes_readl(dd, INTR_STATUS); - eng_busy = value & (0x1); - icq_empty = value & (0x1<<3); - dma_busy = value & (0x1<<23); - } while (eng_busy & (!icq_empty) & dma_busy); - } + + do { + value = aes_readl(dd, INTR_STATUS); + eng_busy = value & (0x1); + icq_empty = value & (0x1<<3); + dma_busy = value & (0x1<<23); + } while (eng_busy & (!icq_empty) & dma_busy); /* settable command to get key into internal registers */ value = 0; @@ -537,12 +531,7 @@ static int tegra_aes_handle_req(struct tegra_aes_dev *dd) /* set iv to the aes hw slot */ memset(dd->buf_in, 0 , AES_BLOCK_SIZE); - ret = copy_from_user((void *)dd->buf_in, (void __user *)dd->iv, - dd->ivlen); - if (ret < 0) { - dev_err(dd->dev, "copy_from_user fail(%d)\n", ret); - goto out; - } + memcpy(dd->buf_in, dd->iv, dd->ivlen); ret = aes_start_crypt(dd, (u32)dd->dma_buf_in, (u32)dd->dma_buf_out, 1, FLAGS_CBC, false); @@ -550,7 +539,6 @@ static int tegra_aes_handle_req(struct tegra_aes_dev *dd) dev_err(dd->dev, "aes_start_crypt fail(%d)\n", ret); goto out; } - memset(dd->buf_in, 0, AES_BLOCK_SIZE); while (total) { dev_dbg(dd->dev, "remain: 0x%x\n", total); |