diff options
| author | Robin Gong <yibin.gong@nxp.com> | 2019-10-23 00:33:42 +0800 |
|---|---|---|
| committer | Robin Gong <yibin.gong@nxp.com> | 2019-10-23 01:46:12 +0800 |
| commit | f0a3172e1ceb04c46377160486ad7dc6ee022850 (patch) | |
| tree | b54c67a9a9b70f709d3ae30ee673930c6ec8a9e4 /drivers/dma/fsl-edma-v3.c | |
| parent | 0857b8ebc8c387564d26458b8d29bbd8c9643335 (diff) | |
MLK-22798-1: dmaengine: fsl-edma-v3: do not enable interrupt in dev_2_dev
Do not enable interrupt in dev_2_dev with cyclic case, since in such
case no any interrupt needed. Otherwise many interrupt will come in
every 64 words transfered in ASRC case, which cause heavy system
loading.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Diffstat (limited to 'drivers/dma/fsl-edma-v3.c')
| -rw-r--r-- | drivers/dma/fsl-edma-v3.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/dma/fsl-edma-v3.c b/drivers/dma/fsl-edma-v3.c index 0e0061e44a5f..36371130528f 100644 --- a/drivers/dma/fsl-edma-v3.c +++ b/drivers/dma/fsl-edma-v3.c @@ -567,6 +567,7 @@ static struct dma_async_tx_descriptor *fsl_edma3_prep_dma_cyclic( int sg_len, i; u32 src_addr, dst_addr, last_sg, nbytes; u16 soff, doff, iter; + bool major_int = true; sg_len = buf_len / period_len; fsl_desc = fsl_edma3_alloc_desc(fsl_chan, sg_len); @@ -607,11 +608,12 @@ static struct dma_async_tx_descriptor *fsl_edma3_prep_dma_cyclic( dst_addr = fsl_chan->fsc.dev_addr; soff = 0; doff = 0; + major_int = false; } fsl_edma3_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr, dst_addr, fsl_chan->fsc.attr, soff, nbytes, 0, - iter, iter, doff, last_sg, true, false, true); + iter, iter, doff, last_sg, major_int, false, true); dma_buf_next += period_len; } |