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authorThor Thayer <tthayer@opensource.altera.com>2015-04-17 17:16:14 -0500
committerBorislav Petkov <bp@suse.de>2015-05-03 11:56:52 +0200
commit7e52a03646af6fb45dd37c5375607858d65e9364 (patch)
tree3daf2092d83a03d1c7a3497d4c66d79e225beb86 /drivers/edac
parentb787f68c36d49bb1d9236f403813641efa74a031 (diff)
EDAC, altera: Do not build it as a module
The SDRAM EDAC requires SDRAM configuration/initialization before SDRAM is accessed (in the preloader) and therefore before Linux is loaded. Having a module compile is not desired so force to be built into kernel. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: mchehab@osg.samsung.com Cc: Takashi Iwai <tiwai@suse.de> Link: http://lkml.kernel.org/r/1429308974-26380-3-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/Kconfig4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index cb59619df23f..2d2530cdf99d 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -377,8 +377,8 @@ config EDAC_OCTEON_PCI
Cavium Octeon family of SOCs.
config EDAC_ALTERA_MC
- tristate "Altera SDRAM Memory Controller EDAC"
- depends on EDAC_MM_EDAC && ARCH_SOCFPGA
+ bool "Altera SDRAM Memory Controller EDAC"
+ depends on EDAC_MM_EDAC=y && ARCH_SOCFPGA
help
Support for error detection and correction on the
Altera SDRAM memory controller. Note that the