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authorValentine Barshak <valentine.barshak@cogentembedded.com>2013-11-29 22:04:09 +0400
committerLinus Walleij <linus.walleij@linaro.org>2013-12-12 20:53:05 +0100
commit8808b64daac68a2c85366c767a3ef850824ede74 (patch)
treeb5cd3f609d7d29cbab7f188b16f31259f89d61f8 /drivers/gpio/gpio-tb10x.c
parent4cc629b7a20945ce35628179180329b6bc9e552b (diff)
gpio: rcar: Fix level interrupt handlinggpio-v3.13-4
According to the manual, if a port is set for level detection using the corresponding bit in the edge/level select register and an external level interrupt signal is asserted, the corresponding bit in INTDT does not use the FF to hold the input. Thus, writing 1 to the corresponding bits in INTCLR cannot clear the corresponding bits in the INTDT register. Instead, when an external input signal is stopped, the corresponding bit in INTDT is cleared automatically. Since the INTDT bit cannot be cleared for the level interrupts until the interrupt signal is stopped, we end up with the infinite loop when using deferred (threaded) IRQ handling. Since a deferred interrupt is disabled by the low-level handler and re-enabled only when the deferred handler is completed, Fix the issue by dropping disabled interrupts from the pending mask as suggested by Laurent Pinchart <laurent.pinchart@ideasonboard.com> Changes in V2: * Drop disabled interrupts from pending mask altogether instead of dropping level interrupts one by one once they get handled. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-tb10x.c')
0 files changed, 0 insertions, 0 deletions