diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2012-11-20 12:40:15 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2012-11-21 08:55:03 +0100 |
| commit | 3f0f8670608766ef26a178d4e80cad3ce030fecc (patch) | |
| tree | d2f192a4a454bd677983c7eb0b88a0016f128bf6 /drivers/gpio/gpiolib-of.c | |
| parent | 5212d096cbed2eae1e442b3f8bf448e6a577af6f (diff) | |
gpiolib: let gpiochip_add_pin_range() specify offset
Like with commit 3c739ad0df5eb41cd7adad879eda6aa09879eb76
it is not always enough to specify all the pins of a gpio_chip
from offset zero to be added to a pin map range, since the
mapping from GPIO to pin controller may not be linear at all,
but need to be broken into a few consecutive sub-ranges or
1-pin entries for complicated cases. The ranges may also be
sparse.
This alters the signature of the function to accept offsets
into both the GPIO-chip local pinspace and the pin controller
local pinspace.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpiolib-of.c')
| -rw-r--r-- | drivers/gpio/gpiolib-of.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index a40cd84c5c10..d542a141811a 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -238,8 +238,20 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip) if (!pctldev) break; + /* + * This assumes that the n GPIO pins are consecutive in the + * GPIO number space, and that the pins are also consecutive + * in their local number space. Currently it is not possible + * to add different ranges for one and the same GPIO chip, + * as the code assumes that we have one consecutive range + * on both, mapping 1-to-1. + * + * TODO: make the OF bindings handle multiple sparse ranges + * on the same GPIO chip. + */ ret = gpiochip_add_pin_range(chip, pinctrl_dev_get_name(pctldev), + 0, /* offset in gpiochip */ pinspec.args[0], pinspec.args[1]); |