diff options
author | Eric Huang <JinHuiEric.Huang@amd.com> | 2015-11-09 17:35:45 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-12-21 16:42:16 -0500 |
commit | 3ec2cdb85f87dba08a025f12030f419847fcbfd6 (patch) | |
tree | ce1c35347a24d26718c00bd0d5bb72bc3ec81295 /drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h | |
parent | 770911a3cfbb43b67b5ea3189b624e4fe2cb27c1 (diff) |
drm/amd/powerplay: update atomctrl for fiji
Add some new functions to support Fiji. Split out
from the previous patch.
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h index 23da436e540d..b5ba37151190 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h @@ -231,6 +231,12 @@ extern int atomctrl_get_engine_pll_dividers_vi(struct pp_hwmgr *hwmgr, uint32_t extern int atomctrl_get_dfs_pll_dividers_vi(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_vi *dividers); extern bool atomctrl_is_voltage_controled_by_gpio_v3(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode); extern int atomctrl_get_voltage_table_v3(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table); +extern int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr, + uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param); +extern int atomctrl_read_efuse(void *device, uint16_t start_index, + uint16_t end_index, uint32_t mask, uint32_t *efuse); +extern int atomctrl_calculate_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type, + uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage, uint16_t dpm_level, bool debug); #endif |