diff options
author | Dave Airlie <airlied@redhat.com> | 2018-05-30 11:05:26 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2018-05-30 11:05:35 +1000 |
commit | 74860cbfdd41e7490f506eae08a0e633be95cc0f (patch) | |
tree | 4503cbedab99007c8eb5a1b433ea55e6c86a30dd /drivers/gpu/drm/exynos | |
parent | dd41fb8547c2422f3a3a75e7226525e8bba9381c (diff) | |
parent | 19832055e2bf5e67f506bac62e4e07326fb545b7 (diff) |
Merge tag 'exynos-drm-next-for-v4.18-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
Add more HW overlays support
- It enables hardware overlay number 4 and 5. For this,
this patch series adds required clocks.
Several fixups
- Fix default value of zpos according to real hardware overlay number.
- Fix error value of exynos_Drm_crtc_get_by_type function correctly.
- Fix static checker warning of scaler_task_done function.
- Fix signedness bug in fimc_setup_clocks function.
One cleanup
- Disable framedone interrupt of DSI device which is not required.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1527229919-25665-1-git-send-email-inki.dae@samsung.com
Diffstat (limited to 'drivers/gpu/drm/exynos')
-rw-r--r-- | drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 21 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_crtc.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_dsi.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimc.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_plane.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_scaler.c | 2 |
6 files changed, 22 insertions, 20 deletions
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index 1c330f2a7a5d..82c95c34447f 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c @@ -31,7 +31,10 @@ #define DSD_CFG_MUX 0x1004 #define DSD_CFG_MUX_TE_UNMASK_GLOBAL BIT(13) -#define WINDOWS_NR 3 +#define WINDOWS_NR 5 +#define PRIMARY_WIN 2 +#define CURSON_WIN 4 + #define MIN_FB_WIDTH_FOR_16WORD_BURST 128 #define I80_HW_TRG (1 << 0) @@ -43,6 +46,9 @@ static const char * const decon_clks_name[] = { "aclk_smmu_decon0x", "aclk_xiu_decon0x", "pclk_smmu_decon0x", + "aclk_smmu_decon1x", + "aclk_xiu_decon1x", + "pclk_smmu_decon1x", "sclk_decon_vclk", "sclk_decon_eclk", }; @@ -74,9 +80,8 @@ static const uint32_t decon_formats[] = { }; static const enum drm_plane_type decon_win_types[WINDOWS_NR] = { - DRM_PLANE_TYPE_PRIMARY, - DRM_PLANE_TYPE_OVERLAY, - DRM_PLANE_TYPE_CURSOR, + [PRIMARY_WIN] = DRM_PLANE_TYPE_PRIMARY, + [CURSON_WIN] = DRM_PLANE_TYPE_CURSOR, }; static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask, @@ -552,12 +557,10 @@ static int decon_bind(struct device *dev, struct device *master, void *data) drm_dev->max_vblank_count = 0xffffffff; for (win = ctx->first_win; win < WINDOWS_NR; win++) { - int tmp = (win == ctx->first_win) ? 0 : win; - ctx->configs[win].pixel_formats = decon_formats; ctx->configs[win].num_pixel_formats = ARRAY_SIZE(decon_formats); - ctx->configs[win].zpos = win; - ctx->configs[win].type = decon_win_types[tmp]; + ctx->configs[win].zpos = win - ctx->first_win; + ctx->configs[win].type = decon_win_types[win]; ret = exynos_plane_init(drm_dev, &ctx->planes[win], win, &ctx->configs[win]); @@ -565,7 +568,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data) return ret; } - exynos_plane = &ctx->planes[ctx->first_win]; + exynos_plane = &ctx->planes[PRIMARY_WIN]; out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI : EXYNOS_DISPLAY_TYPE_LCD; ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base, diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index dc01342e759a..eea90251808f 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c @@ -228,7 +228,7 @@ struct exynos_drm_crtc *exynos_drm_crtc_get_by_type(struct drm_device *drm_dev, if (to_exynos_crtc(crtc)->type == out_type) return to_exynos_crtc(crtc); - return ERR_PTR(-EPERM); + return ERR_PTR(-ENODEV); } int exynos_drm_set_possible_crtcs(struct drm_encoder *encoder, diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index eae44fd714f0..7c3030b7e586 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1264,15 +1264,15 @@ static irqreturn_t exynos_dsi_irq(int irq, void *dev_id) if (status & DSIM_INT_SW_RST_RELEASE) { u32 mask = ~(DSIM_INT_RX_DONE | DSIM_INT_SFR_FIFO_EMPTY | - DSIM_INT_SFR_HDR_FIFO_EMPTY | DSIM_INT_FRAME_DONE | - DSIM_INT_RX_ECC_ERR | DSIM_INT_SW_RST_RELEASE); + DSIM_INT_SFR_HDR_FIFO_EMPTY | DSIM_INT_RX_ECC_ERR | + DSIM_INT_SW_RST_RELEASE); exynos_dsi_write(dsi, DSIM_INTMSK_REG, mask); complete(&dsi->completed); return IRQ_HANDLED; } if (!(status & (DSIM_INT_RX_DONE | DSIM_INT_SFR_FIFO_EMPTY | - DSIM_INT_FRAME_DONE | DSIM_INT_PLL_STABLE))) + DSIM_INT_PLL_STABLE))) return IRQ_HANDLED; if (exynos_dsi_transfer_finish(dsi)) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c index 4dfbfc7f3b84..5ce84025d1cb 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c @@ -1200,7 +1200,7 @@ e_clk_free: int exynos_drm_check_fimc_device(struct device *dev) { - unsigned int id = of_alias_get_id(dev->of_node, "fimc"); + int id = of_alias_get_id(dev->of_node, "fimc"); if (id >= 0 && (BIT(id) & fimc_mask)) return 0; diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index d2a90dae5c71..38a2a7f1204b 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -289,13 +289,12 @@ static const struct drm_plane_helper_funcs plane_helper_funcs = { }; static void exynos_plane_attach_zpos_property(struct drm_plane *plane, - bool immutable) + int zpos, bool immutable) { - /* FIXME */ if (immutable) - drm_plane_create_zpos_immutable_property(plane, 0); + drm_plane_create_zpos_immutable_property(plane, zpos); else - drm_plane_create_zpos_property(plane, 0, 0, MAX_PLANE - 1); + drm_plane_create_zpos_property(plane, zpos, 0, MAX_PLANE - 1); } int exynos_plane_init(struct drm_device *dev, @@ -320,7 +319,7 @@ int exynos_plane_init(struct drm_device *dev, exynos_plane->index = index; exynos_plane->config = config; - exynos_plane_attach_zpos_property(&exynos_plane->base, + exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos, !(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS)); return 0; diff --git a/drivers/gpu/drm/exynos/exynos_drm_scaler.c b/drivers/gpu/drm/exynos/exynos_drm_scaler.c index 63b05b7c846a..91d4382343d0 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_scaler.c +++ b/drivers/gpu/drm/exynos/exynos_drm_scaler.c @@ -397,7 +397,7 @@ static inline u32 scaler_get_int_status(struct scaler_context *scaler) return scaler_read(SCALER_INT_STATUS); } -static inline bool scaler_task_done(u32 val) +static inline int scaler_task_done(u32 val) { return val & SCALER_INT_STATUS_FRAME_END ? 0 : -EINVAL; } |