diff options
author | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2016-03-21 18:00:16 +0200 |
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committer | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2016-03-23 14:23:36 +0200 |
commit | 70e8aa215623b5c4d3d3457fd6e6090ad6bfe9a3 (patch) | |
tree | e357c169449de96224777cb98946096e10e7af09 /drivers/gpu/drm/i915/i915_drv.h | |
parent | 19ec6693098c80d3fd693d9defbc7e46e60e1c1b (diff) |
drm/i915: Split PNV version of crtc_compute_clock()
Split a pnv_crtc_compute_clock(), so the differences between platforms
become more obvious.
With this, there are no more users of intel_limit() or the ->find_dpll()
hook, so get rid of them.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-16-git-send-email-ander.conselvan.de.oliveira@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9d29ab06c99a..08b88c043431 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -575,24 +575,6 @@ struct dpll; struct drm_i915_display_funcs { int (*get_display_clock_speed)(struct drm_device *dev); int (*get_fifo_size)(struct drm_device *dev, int plane); - /** - * find_dpll() - Find the best values for the PLL - * @limit: limits for the PLL - * @crtc: current CRTC - * @target: target frequency in kHz - * @refclk: reference clock frequency in kHz - * @match_clock: if provided, @best_clock P divider must - * match the P divider from @match_clock - * used for LVDS downclocking - * @best_clock: best PLL values found - * - * Returns true on success, false on failure. - */ - bool (*find_dpll)(const struct intel_limit *limit, - struct intel_crtc_state *crtc_state, - int target, int refclk, - struct dpll *match_clock, - struct dpll *best_clock); int (*compute_pipe_wm)(struct intel_crtc_state *cstate); int (*compute_intermediate_wm)(struct drm_device *dev, struct intel_crtc *intel_crtc, |